Invention Grant
- Patent Title: Non-volatile memory devices including blocking insulation patterns with sub-layers having different energy band gaps
- Patent Title (中): 非易失性存储器件包括具有不同能带隙的子层的阻挡绝缘图案
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Application No.: US14554859Application Date: 2014-11-26
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Publication No.: US09349879B2Publication Date: 2016-05-24
- Inventor: Ju-Hyung Kim , Chang-Seok Kang , Sung-Il Chang , Jung-Dal Choi
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel & Sibley, P.A.
- Priority: KR10-2007-0113796 20071108; KR10-2008-0023972 20080314
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L29/792 ; H01L27/115 ; H01L29/66 ; H01L29/423 ; H01L21/28 ; H01L29/51

Abstract:
A non-volatile memory device may include a semiconductor substrate and an isolation layer on the semiconductor substrate wherein the isolation layer defines an active region of the semiconductor substrate. A tunnel insulation layer may be provided on the active region of the semiconductor substrate, and a charge storage pattern may be provided on the tunnel insulation layer. An interface layer pattern may be provided on the charge storage pattern, and a blocking insulation pattern may be provided on the interface layer pattern. Moreover, the block insulation pattern may include a high-k dielectric material, and the interface layer pattern and the blocking insulation pattern may include different materials. A control gate electrode may be provided on the blocking insulating layer so that the blocking insulation pattern is between the interface layer pattern and the control gate electrode. Related methods are also discussed.
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