Invention Grant
- Patent Title: Methodology for pattern density optimization
- Patent Title (中): 模式密度优化方法
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Application No.: US14051549Application Date: 2013-10-11
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Publication No.: US09411924B2Publication Date: 2016-08-09
- Inventor: Hung-Chun Wang , Ming-Hui Chih , Ping-Chieh Wu , Chun-Hung Wu , Wen-Hao Liu , Cheng-Hsuan Huang , Cheng-Kun Tsai , Wen-Chun Huang , Ru-Gun Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G03F1/36

Abstract:
The present disclosure relates to a method of improving pattern density with a low OPC (optical proximity correction) cycle time, and an associated apparatus. In some embodiments, the method is performed by forming an integrated chip (IC) design that is a graphical representation of an integrated chip. One or more low-pattern-density areas of the IC design are identified having a pattern density that results in a processing failure. The low-pattern-density areas are a subset of the IC design. The pattern density is adjusted within the low-pattern-density area by adding one or more dummy shapes within the low-pattern-density areas. A data preparation process is then performed on the IC design to modify shapes of the one or more dummy shapes within the low-pattern-density areas. By introducing dummy shapes into a local area, rather than into an entire integrated chip design, the demands of the subsequent data preparation process are reduced.
Public/Granted literature
- US20150106779A1 METHODOLOGY FOR PATTERN DENSITY OPTIMIZATION Public/Granted day:2015-04-16
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