Invention Grant
- Patent Title: Techniques for improving reliability and performance of partially written memory blocks in modern flash memory systems
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Application No.: US14961424Application Date: 2015-12-07
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Publication No.: US09471488B2Publication Date: 2016-10-18
- Inventor: Yogesh B. Wakchaure , Aliasgar S. Madraswala , Kristopher H. Gaewsky , Charan Srinivasan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alpine Technology Law Group LLC
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/34 ; G11C16/10 ; G06F12/02 ; G11C16/26 ; G11C16/30 ; G11C16/08 ; G11C16/14 ; G11C5/14 ; G11C11/16 ; G11C11/56 ; G11C13/00

Abstract:
Methods and apparatus to improve reliability and/or performance of partially written memory blocks in flash memory systems are described. In some embodiments, a storage device stores information corresponding to a partial write operation performed on a partially programmed memory block of a non-volatile memory. Memory controller logic then cause application of a reduced voltage level and/or an offset value to portion(s) of the non-volatile memory during a read or write operation to the non-volatile memory based at least in part on the stored information. Other embodiments are also disclosed and claimed.
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