Invention Grant
- Patent Title: Memory apparatus, systems, and methods
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Application No.: US14803918Application Date: 2015-07-20
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Publication No.: US09646683B2Publication Date: 2017-05-09
- Inventor: Violante Moschiano , Tommaso Vali , Giovanni Naso , Vishal Sarin , William Henry Radke , Theodore T. Pekny
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/04 ; G11C11/56 ; G11C16/34 ; G11C16/24 ; G11C16/26

Abstract:
Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the influence of factors such as neighboring charge storage elements and parasitic coupling. Pre-compensation or post-compensation of threshold voltage for neighboring programmed aggressor memory cells reduces the threshold voltage uncertainty in a flash memory system. Using a buffer having a data structure such as a lookup table provides for programmable threshold voltage distributions that enables the distribution of data states in a multi-level cell flash memory to be tailored, such as to provide more reliable operation. Additional apparatus, systems, and methods are provided.
Public/Granted literature
- US20150325309A1 MEMORY APPARATUS, SYSTEMS, AND METHODS Public/Granted day:2015-11-12
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