- Patent Title: 1-wire bus PD detection and classification scheme for ethernet PoDL
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Application No.: US14831632Application Date: 2015-08-20
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Publication No.: US09851772B2Publication Date: 2017-12-26
- Inventor: David Dwelley , Andrew J. Gardner
- Applicant: Linear Technology Corporation
- Applicant Address: US CA Milpitas
- Assignee: Linear Technology Corporation
- Current Assignee: Linear Technology Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Patent Law Group LLP
- Agent Brian D Ogonowsky
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F1/00 ; G06F1/32 ; G06F1/26 ; G06F13/42 ; G06F13/40 ; H04L12/10 ; H04L12/40

Abstract:
A PoDL system includes a PSE supplying DC power and Ethernet data over a single twisted wire pair to a PD. Prior to coupling the DC voltage source to the wire pair, the PD needs to receive sufficient power to perform a detection and classification routine with the PSE to determine whether the PD is PoDL-compatible. The PSE has a low current, pull-up current source coupled to a first wire in the wire pair via a first inductor. This pull-up current charges a capacitor in the PD to a desired operating voltage, and the operating voltage is used to power a PD logic circuit. The PD logic circuit and a PSE logic circuit then control pull-down transistors to communicate detection and classification data via the first wire. After the handshaking phase, the PSE then applies the DC voltage source across the wire pair to power the PD for normal operation.
Public/Granted literature
- US20160054777A1 1-WIRE BUS PD DETECTION AND CLASSIFICATION SCHEME FOR ETHERNET PoDL Public/Granted day:2016-02-25
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