- Patent Title: Asymmetric application of pressure to a wafer during a CMP process
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Application No.: US15058956Application Date: 2016-03-02
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Publication No.: US09922837B2Publication Date: 2018-03-20
- Inventor: Chih-Wen Liu , Che-Hao Tu , Po-Chin Nien , William Weilun Hong , Ying-Tsung Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/306 ; H01L21/66 ; H01L23/544 ; H01L21/67 ; H01L21/321
Abstract:
A method includes measuring a topography of a wafer, determining that a first portion of the wafer has a greater thickness than a specified thickness. The method further includes, after measuring the wafer, performing a Chemical Mechanical Polishing (CMP) process to a first side of the wafer, and during application of the CMP process, applying additional pressure to a region of the wafer, the region comprising an asymmetric part of the wafer, the region including at least a part of the first portion of the wafer.
Public/Granted literature
- US20170256414A1 Asymmetric Application of Pressure to a Wafer During a CMP Process Public/Granted day:2017-09-07
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