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    STATUS INDICATION IN A SYSTEM HAVING A PLURALITY OF MEMORY DEVICES
    5.
    发明公开
    STATUS INDICATION IN A SYSTEM HAVING A PLURALITY OF MEMORY DEVICES 审中-公开
    状态在使用多个存储设备的系统

    公开(公告)号：EP2561510A1

    公开(公告)日：2013-02-27

    申请号：EP11771440.2

    申请日：2011-04-19

    申请人： MOSAID Technologies Incorporated

    发明人： SCHUETZ, Roland ,  OH, HakJune ,  PYEON, Hong Beom

    IPC分类号： G11C7/10 ,  G11C11/4096 ,  G11C16/06

    CPC分类号： G11C7/1063 ,  G11C16/06

    摘要： Status indication in a system having a plurality of memory devices is disclosed. A memory device in the system includes a plurality of data pins for connection to a data bus. The memory device also includes a status pin for connection to a status line that is independent from the data bus. The memory device also includes first circuitry for generating, upon completion of a memory operation having a first duration, a strobe pulse of a second duration much shorter than the first duration. The strobe pulse provides an indication of the completion of the memory operation. The memory device also includes second circuitry for outputting the strobe pulse onto the status line via the status pin.

    COMPOSITE SEMICONDUCTOR MEMORY DEVICE WITH ERROR CORRECTION
    6.
    发明公开
    COMPOSITE SEMICONDUCTOR MEMORY DEVICE WITH ERROR CORRECTION 审中-公开
    纠错复合半导体存储装置中

    公开(公告)号：EP2550661A1

    公开(公告)日：2013-01-30

    申请号：EP11758700.6

    申请日：2011-03-02

    申请人： Mosaid Technologies Incorporated

    发明人： KIM, Jin-Ki

    IPC分类号： G11C29/42

    CPC分类号： G06F11/1044 ,  G06F11/1048 ,  G11C2029/0411 ,  H03M13/05 ,  H03M13/611

    摘要： A composite semiconductor memory device, comprising: a plurality of nonvolatile memory devices; and an interface device connected to the plurality of nonvolatile memory devices and for connection to a memory controller, the interface device comprising an error correction coding (ECC) engine. Also, a memory system, comprising: a memory controller; and at least one composite semiconductor memory device configured for being written to and read from by the memory controller and comprising a built-in error correction coding (ECC) engine. Also, a memory system, comprising: a composite semiconductor memory device comprising a plurality of nonvolatile memory devices; and a memory controller connected to the at least one composite semiconductor memory device, for issuing read and write commands to the composite semiconductor memory device to cause data to be written to or read from individual ones of the nonvolatile memory devices; the composite semiconductor memory device providing error-free writing and reading of the data.

    Clock mode determination in a memory system
    7.
    发明公开
    Clock mode determination in a memory system 审中-公开
    在存储系统中的时钟模式确定

    公开(公告)号：EP2475100A3

    公开(公告)日：2012-12-12

    申请号：EP12163402.6

    申请日：2008-02-15

    申请人： Mosaid Technologies Incorporated

    发明人： Gillingham, Peter B. ,  Graham Allan

    IPC分类号： H03K17/296 ,  G11C11/34 ,  G11C16/02 ,  G11C7/06 ,  G11C7/10 ,  G11C7/22 ,  H03K5/13 ,  H03L7/06

    摘要： A clock mode configuration circuit for a memory device is described. A memory system includes any number of memory devices serially connected to each other, where each memory device receives a clock signal. The clock signal can be provided either in parallel to all the memory devices or serially from memory device to memory device through a common clock input. The clock mode configuration circuit in each memory device is set to a parallel mode for receiving the parallel clock signal, and to a serial mode for receiving a source synchronous clock signal from a prior memory device. Depending on the set operating mode, the data input circuits will be configured for the corresponding data signal format, and the corresponding clock input circuits will be either enabled or disabled. The parallel mode and the serial mode is set by sensing a voltage level of a reference voltage provided to each memory device.

    Outlet with analog signal adapter
    8.
    发明公开
    Outlet with analog signal adapter 审中-公开
    带模拟信号适配器的插座

    公开(公告)号：EP2523358A2

    公开(公告)日：2012-11-14

    申请号：EP12179705.4

    申请日：2001-10-11

    申请人： Mosaid Technologies Incorporated

    发明人： Binder, Yehuda

    IPC分类号： H04B3/56 ,  H04L12/66 ,  H04N7/10

    CPC分类号： H04N7/108 ,  H01R27/02 ,  H01R2201/04 ,  H04B3/56 ,  H04B2203/5445 ,  H04B2203/545 ,  H04L12/66 ,  H04N7/102 ,  H04N7/106

    摘要： An outlet (70, 75, 76, 78, 79) for a Local Area Network (LAN), containing an integrated adapter (21, 25) that coverts digital data to and from analog video signal. Such an outlet allows using analog video units in a digital data network (80), eliminating the need for a digital video units or external adapter. The outlet may include a hub (31, 41) that allows connecting both an analog video signal via an adapter, as well as retaining the data network connection, which may be accessed by a network jack (73). The invention may also be applied to a telephone line-based data networking system. In such an environment, the data networking circuitry as well as the analog video adapters are integrated into a telephone outlet, providing for regular telephone service, analog video connectivity, and data networking as well. In such a configuration, the outlet would have a standard telephone jack (71), an analog video jack (72) and at least one data networking jack (73). Outlets according to the invention can be used to retrofit existing LAN and in-building telephone wiring, as well as original equipment in new installation

    摘要翻译： 一种用于局域网（LAN）的插座（70,75,76,78,79），其包含将数字数据转换成模拟视频信号和从模拟视频信号转换的集成适配器（21,25）。 这种插座允许在数字数据网络（80）中使用模拟视频单元，从而不再需要数字视频单元或外部适配器。 插座可以包括集线器（31,41），该集线器允许通过适配器连接模拟视频信号并且保持可以由网络插座（73）访问的数据网络连接。 本发明还可以应用于基于电话线的数据联网系统。 在这样的环境中，数据联网电路以及模拟视频适配器被集成到电话插座中，以提供常规电话服务，模拟视频连接以及数据联网。 在这种配置中，插座将具有标准电话插孔（71），模拟视频插孔（72）和至少一个数据网络插孔（73）。 根据本发明的插座可以用于改装现有的局域网和建筑物内的电话布线，以及新装置中的原始设备

    Non-volatile memory with single bit and multibit programming modes
    9.
    发明公开
    Non-volatile memory with single bit and multibit programming modes 审中-公开
    NichtflüchtigerSpeicher mit Einzel-Bit和Multi-Bit Programmodi

    公开(公告)号：EP2490224A2

    公开(公告)日：2012-08-22

    申请号：EP12003879.9

    申请日：2008-02-14

    申请人： Mosaid Technologies Incorporated

    发明人： Kim, Jin-Ki

    IPC分类号： G11C16/04 ,  G06F12/02 ,  G11C11/56 ,  G11C16/34

    CPC分类号： G11C16/06 ,  G06F12/0246 ,  G06F2212/7204 ,  G06F2212/7206 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/349 ,  G11C16/3495 ,  G11C2211/5641 ,  G11C2211/5646

    摘要： A method of programming a flash memory device which is dynamically configurable to store data in the single bit per cell (SBC) storage mode or the multiple bit per cell (MBC) mode, such that both SBC data and MBC data co-exist within the same memory array. The method including the step of determining a high reliability level or a low reliability level of the received data and programming data in the SBC mode if data is determined to be high reliability and in the MBC mode if data is determined to be low reliability.

    摘要翻译： 一种编程闪速存储器件的方法，其可动态地配置为以每单元（SBC）单个位存储模式或多个位单元（MBC）模式存储数据，使得SBC数据和MBC数据两者共存于 相同的存储器阵列。 该方法包括如果数据被确定为高可靠性并且如果数据被确定为低可靠性则在MBC模式中确定SBC模式下的接收数据和编程数据的高可靠性级别或低可靠性级别的步骤。

    Adaptive antenna system for diversity and interference avoidance in a multi-station network
    10.
    发明公开
    Adaptive antenna system for diversity and interference avoidance in a multi-station network 审中-公开
    适应性天线系统fens dieDiversitäts-und Interferenzverhinderung in einem Mehrstationsnetzwerk

    公开(公告)号：EP2472801A1

    公开(公告)日：2012-07-04

    申请号：EP12161497.8

    申请日：2007-12-14

    申请人： MOSAID Technologies Incorporated

    发明人： Larsen, James David

    IPC分类号： H04L12/56 ,  H04W16/28

    摘要： A wireless network having multiple levels of receivers and transmitters separated by altitude comprising: a first layer of stations including receivers and transmitters with associated antennas located relatively close to the earth's surface; and, a second layer of stations including receivers and transmitters with associated antennas located above the earth's surface configured to connect with said first layer and with other stations of the second layer.

    摘要翻译： 一种具有由高度分离的多级接收机和发射机的无线网络，包括：第一层站，包括接收机和发射机，其相关天线位于相对靠近地球表面; 以及包括接收器和发射器的第二层，所述接收器和发射器具有位于地球表面上方的被配置为与所述第一层连接的第二层和与第二层的其它站相连的天线。