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    SYNCHRONISATION BETWEEN PIPELINES IN A DATA PROCESSING APPARATUS
    91.
    发明授权
    SYNCHRONISATION BETWEEN PIPELINES IN A DATA PROCESSING APPARATUS 有权
    SYNCHRONIZING输送管线数据处理单元

    公开(公告)号：EP1535144B3

    公开(公告)日：2009-02-18

    申请号：EP03730347.6

    申请日：2003-06-04

    申请人： ARM Limited

    发明人： EVANS, Martin Robert ,  DEVEREUX, Ian Victor

    IPC分类号： G06F9/38

    CPC分类号： G06F9/3869 ,  G06F9/3842 ,  G06F9/3881

    摘要： The present invention provides a technique for synchronisation between pipelines in a data processing apparatus. The data processing apparatus comprises a main processor operable to execute a sequence of instructions, the main processor comprising a first pipeline having a first plurality of pipeline stages, and a coprocessor operable to execute coprocessor instructions in said sequence of instructions. The coprocessor comprises a second pipeline having a second plurality of pipeline stages, and each coprocessor instruction is arranged to be routed through both the first pipeline and the second pipeline. Furthermore, at least one synchronising queue is provided coupling a predetermined pipeline stage in one of the pipelines with a partner pipeline stage in the other of the pipelines, the predetermined pipeline stage being operable to cause a token to be placed in the synchronising queue when processing a coprocessor instruction, and the partner pipeline stage being operable to process that coprocessor instruction upon receipt of the token from the synchronising queue. By this approach, the first and second pipelines are synchronised between the predetermined pipeline stage and the partner pipeline stage, and hence ensures that the pipelines are correctly synchronised for crucial transfers of information without requiring that strict synchronisation at all stages is necessary.

    General purpose, programmable media processor
    92.
    发明公开
    General purpose, programmable media processor 失效
    通用可编程媒体处理器

    公开(公告)号：EP1879103A3

    公开(公告)日：2008-12-24

    申请号：EP07112545.4

    申请日：1996-08-16

    申请人： MicroUnity Systems Engineering, Inc.

    发明人： Hansen, Craig ,  Moussouris, John

    IPC分类号： G06F9/30 ,  G06F15/76

    CPC分类号： G06F9/3802 ,  G06F9/30 ,  G06F9/30014 ,  G06F9/30018 ,  G06F9/30025 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/3004 ,  G06F9/30043 ,  G06F9/30072 ,  G06F9/30087 ,  G06F9/30145 ,  G06F9/3867 ,  G06F9/3869 ,  G06F12/0875 ,  G06F12/1027 ,  G06F15/7832 ,  G06F15/7842 ,  G06F2212/2515 ,  H04N21/2365 ,  H04N21/238 ,  H04N21/23805 ,  H04N21/4347 ,  Y02D10/13

    摘要： A wireless device for processing streams of media data in a wireless bi-directional communications network. The bi-directional communications network is capable of transmitting and receiving media data streams which comprise a combination of at least two of audio, video, radio, graphics, encryption, authentication, and networking information. The wireless device has at least one programmable media processor (12) for receiving, processing and transmitting the stream of media data over the bi-directional communications network. The processor executes group instructions to read a plurality of data elements of the media data stream from a register file (110), to perform, on the data elements, group operations including both group integer and group floating point operations capable of dynamically partitioning the data by each specifying one of a plurality of data element sizes, and to write concatenated results in the register file.

    摘要翻译： 一种用于在无线双向通信网络中处理媒体数据流的无线设备。 双向通信网络能够发送和接收包括音频，视频，无线电，图形，加密，认证和联网信息中的至少两种的组合的媒体数据流。 无线设备具有至少一个可编程媒体处理器（12），用于通过双向通信网络接收，处理和发送媒体数据流。 处理器执行组指令以从寄存器文件（110）读取媒体数据流的多个数据元素，以对数据元素执行包括能够动态分区数据的组整数和组浮点操作的组操作 每个指定多个数据元素大小中的一个，并将连接结果写入寄存器文件。

    MICROPROCESSOR WITH AUTOMATIC SELECTION OF SIMD PARALLELISM
    95.
    发明公开
    MICROPROCESSOR WITH AUTOMATIC SELECTION OF SIMD PARALLELISM 有权
    具有SIMD并行性自动选择的微处理器

    公开(公告)号：EP1894091A2

    公开(公告)日：2008-03-05

    申请号：EP06771403.0

    申请日：2006-05-25

    申请人： QUALCOMM INCORPORATED

    发明人： DOCKSER, Kenneth, Alan

    IPC分类号： G06F9/00

    CPC分类号： G06F1/206 ,  G06F1/3203 ,  G06F1/3287 ,  G06F9/3017 ,  G06F9/30181 ,  G06F9/30189 ,  G06F9/3836 ,  G06F9/3869 ,  G06F9/3885 ,  G06F9/3887 ,  Y02D10/16 ,  Y02D10/171 ,  Y02D50/20

    摘要： Automatic selective power and energy control of one or more processing elements matches a degree of parallelism to a monitored condition, in a highly parallel programmable data processor. For example, logic of the parallel processor detects when program operations (e.g. for a particular task or due to a detected temperature) require less than the full width of the data path. In response, the control logic automatically sets a mode of operation requiring a subset of the parallel processing capacity. At least one parallel processing element, that is not needed, can be shut down, to conserve energy and/or to reduce heating (i.e., power consumption). At a later time, when operation of the added capacity is appropriate, the logic detects the change in processing conditions and automatically sets the mode of operation to that of the wider data path, typically the full width. The mode change reactivates the previously shut-down processing element.

    摘要翻译： 在高度并行的可编程数据处理器中，一个或多个处理元件的自动选择功率和能量控制匹配与被监测条件的并行程度。 例如，并行处理器的逻辑检测程序操作（例如，针对特定任务或由于检测到的温度）何时需要小于数据路径的全宽度。 作为响应，控制逻辑自动设置需要并行处理能力子集的操作模式。 至少一个不需要的并行处理元件可以关闭，以节省能量和/或减少加热（即功耗）。 稍后，当额外容量的操作适当时，逻辑检测处理条件的变化并自动将操作模式设置为较宽数据路径的操作模式，典型地为全宽度。 模式改变重新激活先前关闭的处理元件。

    DATA PIPELINE MANAGEMENT SYSTEM AND METHOD FOR USING THE SYSTEM
    96.
    发明公开
    DATA PIPELINE MANAGEMENT SYSTEM AND METHOD FOR USING THE SYSTEM 有权
    用于管理数据管道及使用方法

    公开(公告)号：EP1894089A2

    公开(公告)日：2008-03-05

    申请号：EP06755994.8

    申请日：2006-05-22

    申请人： NXP B.V.

    发明人： CASTANHA, Ricardo ,  VERMUNT, Franciscus Maria ,  VOS, Tom

    IPC分类号： G06F5/06

    CPC分类号： G06F9/3869

    摘要： The present invention relates to a data pipeline management system and more particularly to a minimum memory solution for unidirectional data pipeline management in a situation where both the Producer and Consumer need asynchronous access to the pipeline, data is non-atomic, and only the last complete (and validated) received message is relevant and once a data read from/write to the pipeline is initiated, that data must be completely processed. The data pipeline management system according to the invention can be implemented as a circular queue of as little as three entries and an additional handshake mechanism, implemented as a set of indices that can fit in a minimum of six bits (2 x 2 + 2 x 1). Both the Producer and Consumer will have a 2 bit index indicating where they are in the queue, and a 1 bit binary value indicating a special situation. Both parties can read all the indices but can only write their own, i.e. P and wrapP for the Producer and C and wrapC for the Consumer. For management of the handshakes a set of rules is provided.

    General purpose, programmable media processor
    100.
    发明公开
    General purpose, programmable media processor 失效
    Programmierbarer Allzweckmedienprozessor

    公开(公告)号：EP1876535A2

    公开(公告)日：2008-01-09

    申请号：EP07111473.0

    申请日：1996-08-16

    申请人： MicroUnity Systems Engineering, Inc.

    发明人： Hansen, Craig, c/o MicroUnity, Inc ,  Moussouris, John, c/o MicroUnity Inc

    IPC分类号： G06F15/76 ,  G06F17/10

    CPC分类号： G06F9/3802 ,  G06F9/30 ,  G06F9/30014 ,  G06F9/30018 ,  G06F9/30025 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/3004 ,  G06F9/30043 ,  G06F9/30072 ,  G06F9/30087 ,  G06F9/30145 ,  G06F9/3867 ,  G06F9/3869 ,  G06F12/0875 ,  G06F12/1027 ,  G06F15/7832 ,  G06F15/7842 ,  G06F2212/2515 ,  H04N21/2365 ,  H04N21/238 ,  H04N21/23805 ,  H04N21/4347 ,  Y02D10/13

    摘要： A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (106). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.

    摘要翻译： 一种用于处理和发送媒体数据流的通用可编程媒体处理器（12）。 媒体处理器（12）包括执行单元（100），其通过媒体数据流保持基本上峰值数据。 执行单元（100）包括动态分离多精度运算单元（102），可编程开关（104）和可编程扩展数学元件（106）。 高带宽外部接口（124）以基本上峰值的速率将媒体数据流提供给通用寄存器文件（110）和执行单元。 提供存储器管理单元，以及指令和数据高速缓冲存储器/缓冲器（118,120）。 通用的可编程媒体处理器（12）被布置在由光纤电缆，同轴电缆和双绞线组成的网络结构中，以传输，处理和接收单个或统一的媒体数据流。