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    ANALOG SIGNAL PROCESSING DEVICE
    91.
    发明公开
    ANALOG SIGNAL PROCESSING DEVICE 审中-公开
    ANALOGSIGNALVERARBEITUNGSANORDNUNG

    公开(公告)号：EP2128989A1

    公开(公告)日：2009-12-02

    申请号：EP07737318.1

    申请日：2007-02-22

    申请人： Fujitsu Limited

    发明人： TSUKAMOTO, Sanroku

    IPC分类号： H03M1/36 ,  H03M1/10

    CPC分类号： H03M1/1004 ,  H03M1/204 ,  H03M1/365

    摘要： An analog signal processing device includes an arithmetic unit arithmetically processing plural comparison reference voltages and an analog input signal, a comparator which has at least one or more judgment points for the comparison reference voltages and to which an output of the arithmetic unit is inputted, and a coupling controller controlling connections between the arithmetic unit and the comparator. The arithmetic unit includes plural correctable first signal processors, and the number of the first signal processors is more than is necessary for the plural comparison reference voltages. When one or more first signal processors are in a correction operation, first signal processors which are not in the correction operation in the arithmetic unit are connected to the comparator. Thus, errors caused by interpolation are corrected in the background while suppressing the number of elements by the interpolation, it becomes possible to use small size elements by correcting the influence of element dispersion, and a device with high accuracy and high speed can be realized.

    摘要翻译： 模拟信号处理装置包括算术处理多个比较参考电压的运算单元和模拟输入信号，具有比较参考电压的至少一个或多个判断点并输入运算单元的输出的比较器，以及 控制运算单元和比较器之间的连接的耦合控制器。 算术单元包括多个可校正的第一信号处理器，并且第一信号处理器的数量大于多个比较参考电压所需的数量。 当一个或多个第一信号处理器处于校正操作中时，运算单元中未处于校正操作的第一信号处理器连接到比较器。 因此，通过插补来抑制由元素的数量而在背景中校正由插补引起的误差，可以通过校正元件色散的影响来使用小尺寸元件，并且可以实现高精度和高速度的装置。

    MULTISTAGE ANALOG/DIGITAL CONVERTER AND METHOD FOR CALIBRATING SAID CONVERTER
    93.
    发明授权
    MULTISTAGE ANALOG/DIGITAL CONVERTER AND METHOD FOR CALIBRATING SAID CONVERTER 有权
    多级模/数字转换器和方法，用于校准转换器

    公开(公告)号：EP1989781B1

    公开(公告)日：2009-06-24

    申请号：EP06728459.6

    申请日：2006-02-27

    申请人： STMicroelectronics S.r.l.

    发明人： CESURA, Giovanni Antonio ,  MASSOLINI, Roberto Giampiero

    IPC分类号： H03M1/10 ,  H03M1/40 ,  H03M1/44 ,  H03M1/16

    CPC分类号： H03M1/1061 ,  H03M1/1004 ,  H03M1/162 ,  H03M1/164 ,  H03M1/40 ,  H03M1/44

    摘要： Multistage ADC (1) for converting in multi- step cycles, analogue samples (V] n) of an input signal (VIn) into digital codes (Dout) each cycle resolving at least one bit of digital code (Dout), the converter (1) including: - a generation block (3) of a pseudorandom sequence (Y' ts) to be summed to said analogue samples, obtaining a second sequence ( V+in) of analog samples; - conversion means (5) with controllable digital gain ( g ), receiving the second sequence (V+in) and outputting bits of said digital codes (Dout); - a feedback loop (2, 6, 7, 8) for performing said multi- step conversion cycles, with a loop gain (GLoop); - a digital calibration block (9) matching the digital gain ( g ) to the loop gain ( GLoop ); said second sequence (V+in) including predetermined samples with no contribution of said pseudorandom sequence (?-ts); - a prediction block (10) to produce a digital estimation (Dout) of said input signal (Vin).

    Comparing method and device for analog-to-digital conversion method, analog-to-digital converter, semiconductor device for detecting distribution of physical quantity
    95.
    发明公开
    Comparing method and device for analog-to-digital conversion method, analog-to-digital converter, semiconductor device for detecting distribution of physical quantity 有权
    用于比较的方法和装置，模拟 - 数字转换方法，模拟数字转换器，半导体器件用于检测物理量分布的

    公开(公告)号：EP2065714A2

    公开(公告)日：2009-06-03

    申请号：EP09003035.4

    申请日：2005-11-07

    申请人： Sony Corporation

    发明人： Muramatsu, Yoshinori ,  Fukushima, Noriyuki ,  Nitta, Yoshikazu ,  Yasui, Yukihiro

    IPC分类号： G01R19/00 ,  H03M1/10 ,  H03M1/12 ,  H03M1/56 ,  H04N5/335

    CPC分类号： H03M1/1295 ,  H03K5/2481 ,  H03K5/249 ,  H03M1/1023 ,  H03M1/123 ,  H03M1/56 ,  H04N5/378

    摘要： In an analog-to-digital conversion method for converting a difference signal component representing a difference between a reference component and a signal component in an analog signal to be processed into digital data, in a first process, a signal corresponding to one of the reference component and the signal component is compared with a reference signal for conversion into the digital data. Concurrently with the comparison, counting is performed in one of a down-count mode and an up-count mode, and a count value at a time of completion of the comparison is held. In a second process, a signal corresponding to the other one of the reference component and the signal component is compared with the reference signal. Concurrently with the comparison, counting is performed in the other one of the down-count mode and the up-count mode, and a count value at a time of completion of the comparison is held.

    摘要翻译： 在用于将表示参考分量和在一个模拟信号的信号分量之间的差的差信号分量的模拟 - 数字转换方法，将被处理成数字数据，在第一过程中，一个信号对应于参考的一个 分量和信号分量与用于转换成数字数据的参考信号进行比较。 同时进行的比较，计数执行以向下计数模式和向上计数模式中的一个，并在比较结束时的计数值被保持。 在第二种方法中，对应于参考分量和信号分量中的另一个的信号与参考信号进行比较。 同时与比较，计数在递减计数模式和递增计数模式，并在比较结束时的计数值保持在另一个执行。

    D/A CONVERTER
    98.
    发明公开
    D/A CONVERTER 审中-公开
    D / A-UMSETZER

    公开(公告)号：EP1988635A1

    公开(公告)日：2008-11-05

    申请号：EP07708287.3

    申请日：2007-02-09

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： HARIGAE, Shinichi

    IPC分类号： H03M3/02 ,  H03M1/10

    CPC分类号： H03M7/3031 ,  H03M3/354 ,  H03M3/50 ,  H03M7/3026

    摘要： A D/A converter (100) includes a delta-sigma modulation circuit (102) including a quantizer (105) that receives a digital signal to quantize it based on a quantization reference value, a local D/A conversion circuit (107) for converting an output from the delta-sigma modulating circuit to an analog signal to be outputted, and a control circuit (109) for correcting the quantization reference value of the quantizer. The quantization reference value is established for each of a plurality of discrete output values that the quantizer may output. The control circuit (109) corrects the quantization reference value to cancel any distortion that would occur in a circuit following the delta-sigma modulation circuit (102) and including the local D/A conversion circuit (107).

    摘要翻译： AD / A转换器（100）包括Δ-Σ调制电路（102），该Δ-Σ调制电路（102）包括量化器（105），该量化器（105）基于量化参考值接收数字信号以对其进行量化;本地D / A转换电路 从Δ-Σ调制电路到要输出的模拟信号的输出;以及用于校正量化器的量化参考值的控制电路（109）。 针对量化器可以输出的多个离散输出值中的每一个建立量化参考值。 控制电路（109）校正量化参考值以消除在Δ-Σ调制电路（102）之后并且包括本地D / A转换电路（107）的电路中将发生的任何失真。