公开(公告)号：EP2424107B1

公开(公告)日：2013-09-11

申请号：EP11173807.6

申请日：2011-07-13

申请人： Onkyo Corporation

发明人： Kawaguchi, Tsuyoshi ,  Kitagawa, Norimasa ,  Sekiya, Mamoru ,  Takehara, Yu

IPC分类号： H03F3/30 ,  H03F1/30 ,  H03F1/32 ,  H03F3/343

CPC分类号： H03F3/3076 ,  H03F1/307 ,  H03F1/3217 ,  H03F3/3066 ,  H03F3/3432 ,  H03F2200/447 ,  H03F2200/91 ,  H03F2203/30078 ,  H03F2203/30111

公开(公告)号：EP1935090A1

公开(公告)日：2008-06-25

申请号：EP06809333.5

申请日：2006-09-19

申请人： NXP B.V.

发明人： BRUIN, Paulus, P., F., M. ,  SPLITHOF, Mike, H.

IPC分类号： H03F1/52

CPC分类号： H03F1/523 ,  H03F3/301 ,  H03F2200/462 ,  H03F2200/481 ,  H03F2200/69 ,  H03F2203/30078 ,  H03F2203/30111

摘要： An electronic device with an amplifier output stage (OS) and an over-current detection means (OCDM) for detecting an output over-current (IHS, ILS) of the output stage (OS) is provided. The over-current detection means (OCDM) comprises a level detection means (LDM) for detecting a level of the output current (IO) exceeding a first level of the output current (IDET), and a timing detection means (TDM) for detecting a duration during which the output current (IO) exceeds the first current level (IDET) being a maximum current level.

公开(公告)号：EP2963814B1

公开(公告)日：2018-08-08

申请号：EP14175513.2

申请日：2014-07-03

申请人： BANG & OLUFSEN A/S

发明人： Selmer Jensen, Jorgen ,  Nörmölle Rasmussen, Jens

IPC分类号： H03F3/30 ,  H03F1/30

CPC分类号： H03F1/302 ,  H03F1/307 ,  H03F1/308 ,  H03F1/32 ,  H03F3/183 ,  H03F3/21 ,  H03F3/3016 ,  H03F3/3066 ,  H03F3/45174 ,  H03F2200/321 ,  H03F2200/462 ,  H03F2200/78 ,  H03F2203/30024 ,  H03F2203/30078 ,  H03F2203/30111

摘要： An amplifier arrangement comprising first and second power amplifiers (T1, T2) having drains connected to positive and negative drive voltages, respectively, and gates connected to an input signal. The arrangement further comprises first and second current sensors (1, 2) for detecting first and second drain currents from the power amplifiers, processing circuitry (3) adapted to identify the smallest drain current, and a feedback control loop (5) and means for driving a bias current dependent on a feedback signal through a resistor connected between the input signal and the gate of an inactive one of the first and second power amplifiers. The control loop will keep the idle current constant in the transistor with the lowest current (the inactive transistor). Thereby, the current running in the transistor which does not deliver current to the load will be fixed at a desired value.

公开(公告)号：EP3017540A1

公开(公告)日：2016-05-11

申请号：EP13888804.5

申请日：2013-07-04

申请人： Nokia Technologies Oy

发明人： LI, Lei

IPC分类号： H03F3/26

CPC分类号： H03F3/3001 ,  H03F3/30 ,  H03F3/3022 ,  H03F2003/3003 ,  H03F2200/03 ,  H03F2200/451 ,  H03F2203/30078 ,  H03F2203/30081 ,  H03F2203/30111 ,  H03F2203/30114 ,  H03K17/163

摘要： There are disclosed various methods and apparatuses. In some embodiments of the method an input signal is provided to an input of a first transistor of a push-pull circuit via a first slew-rate adjuster; and the input signal is also provided to an input of a second transistor of the push-pull circuit via a second slew-rate adjuster. The input signal is effected by the first slew-rate adjuster and the second slew-rate adjuster to switch the first transistor on after the second transistor switches off when the amplitude of the input signal increases. The input signal is effected by the first slew-rate adjuster and the second slew-rate adjuster the input signal to switch the second transistor on after the first transistor switches off when the amplitude of the input signal decreases. In some embodiments the apparatus comprises a push-pull circuit comprising a first transistor and a second transistor; an input to receive an input signal; a first slew-rate adjuster adapted to provide the input signal to the input of the first transistor; and a second slew-rate adjuster adapted to provide the input signal to the input of the second transistor. A time constant of the first slew-rate adjuster is dependent on the direction of change of the input signal, and a time constant of the second slew-rate adjuster is dependent on the direction of change of the input signal.

摘要翻译： 公开了各种方法和装置。 在该方法的一些实施例中，通过第一压摆率调节器将输入信号提供给推挽电路的第一晶体管的输入; 并且输入信号也经由第二压摆率调节器提供给推挽电路的第二晶体管的输入。 输入信号由第一压摆率调整器和第二摆率调节器实现，以在输入信号的幅度增加时第二晶体管截止之后，将第一晶体管导通。 输入信号由第一压摆率调节器和第二转换速率调节器实现，当输入信号的幅度减小时，在第一晶体管截止之后，输入信号切换第二晶体管导通。 在一些实施例中，该装置包括一个包括第一晶体管和第二晶体管的推挽电路; 用于接收输入信号的输入; 第一压摆率调节器，适于将输入信号提供给第一晶体管的输入; 以及适于将输入信号提供给第二晶体管的输入的第二压摆率调节器。 第一压摆率调节器的时间常数取决于输入信号的变化方向，第二转换速率调节器的时间常数取决于输入信号的变化方向。

公开(公告)号：EP2461483A4

公开(公告)日：2014-04-23

申请号：EP10804152

申请日：2010-03-30

申请人： KYOCERA CORP

发明人： NAGAYAMA AKIRA ,  FUKUOKA YASUHIKO ,  IGARASHI SADAO ,  ISOYAMA SHINJI

IPC分类号： H03K17/693 ,  H03F3/193 ,  H03F3/24 ,  H03F3/30 ,  H03F3/68 ,  H03K17/687

CPC分类号： H03F3/193 ,  H03F3/245 ,  H03F3/3028 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2203/30078 ,  H03F2203/30114 ,  H03K17/6874 ,  H03K17/693

公开(公告)号：EP1935090B1

公开(公告)日：2010-11-17

申请号：EP06809333.5

申请日：2006-09-19

申请人： NXP B.V.

发明人： BRUIN, Paulus, P., F., M. ,  SPLITHOF, Mike, H.

IPC分类号： H03F1/52

CPC分类号： H03F1/523 ,  H03F3/301 ,  H03F2200/462 ,  H03F2200/481 ,  H03F2200/69 ,  H03F2203/30078 ,  H03F2203/30111

摘要： An electronic device with an amplifier output stage (OS) and an over-current detection means (OCDM) for detecting an output over-current (IHS, ILS) of the output stage (OS) is provided. The over-current detection means (OCDM) comprises a level detection means (LDM) for detecting a level of the output current (IO) exceeding a first level of the output current (IDET), and a timing detection means (TDM) for detecting a duration during which the output current (IO) exceeds the first current level (IDET) being a maximum current level.

公开(公告)号：EP0409476A3

公开(公告)日：1991-10-16

申请号：EP90307590.1

申请日：1990-07-11

申请人： AT&T Corp.

发明人： Khoury, John M.

IPC分类号： H03F3/30

CPC分类号： H03F3/3001 ,  H03F2203/30057 ,  H03F2203/30078 ,  H03F2203/30096 ,  H03F2203/30111 ,  H03F2203/30129

摘要： A low impedance class AB buffer stage in complementary transistor technology has its quiescent current stabilized and its operation thereby made more reliable by means of suitable error op-amps (A1, A2) that are supplied with transistor feedback loops (M1, M2) which are connected to the stage's output terminal (21) through resistors (R1, R2). In addition, for full rail-to-rail output voltage capability, transistor switching devices (M5, M6) are added to turn off current through either of the resistors (R1, R2) when the output voltage (V OUT ) of the stage approaches the voltage of either power rail, and also a pair of serially rail-to-rail connected transistors (M3, M4) is connected in parallel with the feedback loops.

公开(公告)号：EP0409476A2

公开(公告)日：1991-01-23

申请号：EP90307590.1

申请日：1990-07-11

申请人： AT&T Corp.

发明人： Khoury, John M.

IPC分类号： H03F3/30

CPC分类号： H03F3/3001 ,  H03F2203/30057 ,  H03F2203/30078 ,  H03F2203/30096 ,  H03F2203/30111 ,  H03F2203/30129

摘要： A low impedance class AB buffer stage in complementary transistor technology has its quiescent current stabilized and its operation thereby made more reliable by means of suitable error op-amps (A1, A2) that are supplied with transistor feedback loops (M1, M2) which are connected to the stage's output terminal (21) through resistors (R1, R2). In addition, for full rail-to-rail output voltage capability, transistor switching devices (M5, M6) are added to turn off current through either of the resistors (R1, R2) when the output voltage (V OUT ) of the stage approaches the voltage of either power rail, and also a pair of serially rail-to-rail connected transistors (M3, M4) is connected in parallel with the feedback loops.

摘要翻译： 互补晶体管技术中的低阻抗级AB缓冲级具有静态电流稳定，其操作使得通过提供有晶体管反馈回路（M1，M2）的合适的误差运算放大器（A1，A2）使其更可靠，这些误差运算放大器 通过电阻（R1，R2）连接到级的输出端（21）。 另外，对于完全的轨到轨输出电压能力，当阶段的输出电压（VOUT）接近电阻（R1，R2）时，添加晶体管开关器件（M5，M6）以关断任何一个电阻（R1，R2） 任一电源轨的电压以及一对串联轨至轨连接的晶体管（M3，M4）与反馈回路并联连接。