摘要:
Embodiments of the invention provide a current sensor. The current sensor comprises: a current sensing element having a first sensing terminal and a second sensing terminal, a first current mirror network CMN cell, a second CMN cell and a third CMN cell. The first CMN cell comprises: a first CMN that has a first high impedance terminal, a first low impedance terminal and a first output terminal, and a first local current mode feedback network LCMFN connected between the first output terminal and the first low impedance terminal. The first CMN cell is DC-coupled to the first sensing terminal of the current sensing element via the first high impedance terminal and operative to generate a first output signal according to the current sensed at the first sensing terminal. The second CMN cell comprises: a second CMN that has a second high impedance terminal, a second low impedance terminal and a second output terminal, and a second LCMFN connected between the second output terminal and the second low impedance terminal. The second CMN cell is DC-coupled to the second sensing terminal of the current sensing element via the second high impedance terminal and operative to generate a second output signal according to the current sensed at the second sensing terminal. The third CMN cell comprises: a third CMN that has a third high impedance terminal, a third low impedance terminal and a third output terminal, and a third LCMFN connected between the third output terminal and the third low impedance terminal. The third CMN cell receives the first output signal and the second output signal via the third high impedance terminal and the third low impedance terminal, respectively and is operative to generate a third output signal according to a combination of the first output signal and the second output signal.
摘要:
A frequency selective circuit includes a first transistor, an impedance element, a first capacitive element, a second capacitive element, a second capacitive and a second transistor. The first transistor includes a first terminal, a second terminal and a control terminal. The impedance element is coupled between the first terminal and the control terminal of the first transistor. The first capacitive element is coupled to the first terminal of the first transistor. The second capacitive element is coupled to the control terminal of the first transistor. The second transistor includes a first terminal, a second terminal and a control terminal, wherein the control terminal of the second transistor is coupled to the control terminal of the first transistor.
摘要:
A transmitter (100) according to the present invention includes an RF signal generator (1a) and a current mode class-D amplifier (2a). The RF signal generator (1a) divides an input radio signal into an amplitude signal (r(t)) and a rectangular phase signal (Rth(t)) and outputs the amplitude signal and the rectangular phase signal. The current mode class-D amplifier (2a) amplifies the radio signal with the amplitude signal (r(t)) and the rectangular phase signal (Rth(t)). The current mode class-D amplifier (2a) includes variable current sources (21, 22) that are controlled by the amplitude signal (r(t)) and supply a current to the current mode class-D amplifier (2a). The current mode class-D amplifier (2a) includes switching elements (23, 24) that connect the variable current sources (21, 22) to one of a terminal connected a ground potential GND and an output terminal according to the rectangular phase signal (Rth(t)).
摘要:
Embodiments of the invention provide a current sensor. The current sensor comprises: a current sensing element having a first sensing terminal and a second sensing terminal, a first current mirror network CMN cell, a second CMN cell and a third CMN cell. The first CMN cell comprises: a first CMN that has a first high impedance terminal, a first low impedance terminal and a first output terminal, and a first local current mode feedback network LCMFN connected between the first output terminal and the first low impedance terminal. The first CMN cell is DC-coupled to the first sensing terminal of the current sensing element via the first high impedance terminal and operative to generate a first output signal according to the current sensed at the first sensing terminal. The second CMN cell comprises: a second CMN that has a second high impedance terminal, a second low impedance terminal and a second output terminal, and a second LCMFN connected between the second output terminal and the second low impedance terminal. The second CMN cell is DC-coupled to the second sensing terminal of the current sensing element via the second high impedance terminal and operative to generate a second output signal according to the current sensed at the second sensing terminal. The third CMN cell comprises: a third CMN that has a third high impedance terminal, a third low impedance terminal and a third output terminal, and a third LCMFN connected between the third output terminal and the third low impedance terminal. The third CMN cell receives the first output signal and the second output signal via the third high impedance terminal and the third low impedance terminal, respectively and is operative to generate a third output signal according to a combination of the first output signal and the second output signal.
摘要:
A resistor-input transconductor includes a circuit configured to generate a common-mode compensation current. The common-mode compensation current is used to compensate for the common-mode voltage of the inputs. A current output of the resistor-input transconductor is proportional to a voltage difference between the two inputs and essentially independent of a common-mode voltage of the two inputs. The resistor input transconductor may be applied in a variety of applications including, for example, communications.
摘要:
A chopper-stabilized current mirror includes a pair of FETs connected to mirror an input current Iin,. In one embodiment, switching networks S1 and S2 have their respective inputs connected to the FETs' drains, and are operated with clock signals CLK1 and CLK2, respectively. An ro boost amplifier Al has its inputs connected to the outputs of S2 and its outputs connected to the gates of a pair of cascode FETs via a switching network S3 which, is operated with clock signal CLK2S, with the drain of one cascode FET connected to Iin and the drain of the other providing the mirror's output Iout Sl is clocked to reduce mismatch errors and S2 and S3 are clocked to reduce errors due to Al's offset voltage, with CLK2 and CLK2S shifted with respect to CLK1 to reduce errors due to parasitic capacitances.
摘要:
The present invention concerns an amplifying device arranged to receive an input signal having a certain duty cycle. The amplifying device comprise a first switching unit having an input terminal adapted to receive a first half of the input signal, and an output terminal adapted to be connected to a first signal output where a first half of an output signal is provided. The amplifying device comprise a second switching unit having an input terminal adapted to receive a second half of the input signal and an output terminal adapted to be connected to a second signal output where a second half of the output signal is provided. Also, the first switching unit and the second switching units are adapted to receive an input signal, wherein the first half of said input signal has the same duty cycle as the second half of the input signal but shifted in phase. The present invention also concerns a wireless transceiver and a radio transmission device.
摘要:
A small signal amplifier with a large signal output boost stage are connected between first and second supply rails. The small signal amplifier receives first and second input signals and provides an output signal at an output node which drives a load. Under small signal conditions, the output signal varies approximately linearly with the difference voltage. However, under large signal conditions, a rail-to-rail large signal output boost stage connected to the output node is arranged to drive the output node close to the first or second supply rail as needed to provide the current demanded by the load. The large signal output boost stage is off in small signal conditions, but comes on rapidly and transfers maximum charge to the load under large signal conditions.