摘要:
Variable gain amplifiers offering high frequency response with improved linearity and reduced power dissipation are provided. An amplifier is disclosed that is constructed from a one-stage topology with multiple signal paths and compensation networks for improved linearity and stable operation. In this amplifier, improved performance is obtained by replacing single transistor components (283) with enhanced active devices (211,212,213) which incorporate local negative feedback.
摘要:
Variable gain amplifiers offering high frequency response with improved linearity and reduced power dissipation are provided. An amplifier is disclosed that is constructed from a one-stage topology with multiple signal paths and compensation networks for improved linearity and stable operation. In this amplifier, improved performance is obtained by replacing single transistor components with enhanced active devices which incorporate local negative feedback. One embodiment of the invention is a transconductance enhancement circuit that improves transconductance and input impedance relative to the prior art. A further development is an enhanced active cascode circuit that provides improved linearity. A high frequency bipolar transistor switch is also disclosed that incorporates lateral PNP transistors as high frequency switches with improved OFF-state to ON-state impedance ratio to realize a variable gain function. These circuits are combined in an amplifier circuit that provides variable gain and high frequency performance, with improved linearity, gain, and input impedance.
摘要:
A detection circuit for detecting the output power of a power amplifier comprises a first current mirror transistor (Ti 1) having a base, which is connectable to a power transistor (T10), and a collector, a RF detection means (RF-det) for detecting the RF current flowing through the current mirror transistor (T11). Said RF detection means (RFdet) is connected to the collector of said first current mirror transistor (T11). Said detection circuit further comprises a biasing means (bias-RF-det) for biasing said RF detection means (RF-det), wherein said biasing means is connected to said collector of said first current mirror (T11) and said RF detection means (RF-det).
摘要:
A combined current difference and operational amplifier circuit suitable for use either as or in a filter embodied in an integrated receiver. The illustrated circuit (10) comprises inputs (I A and I B ) for oppositely phased current signals which are applied to a current mirroring circuit formed by first and second NPN transistors (Q1,Q2) whose bases are connected to a junction (20). Equal value resistors (R1,R2) are serially connected in the emitter circuits of the first and second transistors and the current inputs are applied to the free ends of the resistors (R1,R2). The base-collector path of a third NPN transistor (Q3) is connected between the free end of one of the resistors (R1) and said junction (20). A current difference signal (i b -i a ) derived from the free end of the other of the resistors and is applied to the virtual earth input of an operational amplifier formed by a common emitter stage (Q4) coupled to an emitter follower (Q5), the operational amplifier has a capacitive (C1) feedback between its output and virtual earth input so that the d.c. potential at said input has no effect on the d.c. operating point at which the output sits. In an alternative embodiment, resistive (Rf) feedback may be used instead of a capacitive feedback. An embodiment is disclosed which enables the input and output voltage swings to be increased without unduly degrading the bandwidth.
摘要:
A conventional PNP transistor current mirror circuit (10) provides identical first and second reference currents (Ir) each containing the same noise component (which may be due to high frequency supply voltage Vs variations). An input current (Ii) is subtracted from the first reference current to provide a difference current (Id) containing the noise component in the first reference current. An NPN current mirror circuit (20) subtracts the difference current from the second reference current such that the noise component in the difference current cancels the noise component in the second reference current to provide an output current (Io) which is an identical "mirror image" of the input current and which is free of the cancelled noise component.
摘要:
Embodiments of the invention provide a current sensor. The current sensor comprises: a current sensing element having a first sensing terminal and a second sensing terminal, a first current mirror network CMN cell, a second CMN cell and a third CMN cell. The first CMN cell comprises: a first CMN that has a first high impedance terminal, a first low impedance terminal and a first output terminal, and a first local current mode feedback network LCMFN connected between the first output terminal and the first low impedance terminal. The first CMN cell is DC-coupled to the first sensing terminal of the current sensing element via the first high impedance terminal and operative to generate a first output signal according to the current sensed at the first sensing terminal. The second CMN cell comprises: a second CMN that has a second high impedance terminal, a second low impedance terminal and a second output terminal, and a second LCMFN connected between the second output terminal and the second low impedance terminal. The second CMN cell is DC-coupled to the second sensing terminal of the current sensing element via the second high impedance terminal and operative to generate a second output signal according to the current sensed at the second sensing terminal. The third CMN cell comprises: a third CMN that has a third high impedance terminal, a third low impedance terminal and a third output terminal, and a third LCMFN connected between the third output terminal and the third low impedance terminal. The third CMN cell receives the first output signal and the second output signal via the third high impedance terminal and the third low impedance terminal, respectively and is operative to generate a third output signal according to a combination of the first output signal and the second output signal.