摘要:
An integrated circuit package comprises a thermally conductive plate for receiving an integrated circuit and an open rectangular structure of conductor and insulator for surrounding the sides of the circuit and presenting one or more linear arrays of conductive connectors extending laterally through the rectangular structure. Preferably the rectangular structure also includes transverse contacts. Advantageously the plate includes extensions beyond the rectangular structure for acting as cooling fins on opposing sides of the rectangular structure. The linear arrays and cooling fins are preferably on different pairs of parallel sides. The integrated circuit package permits the aggregation of packages into assemblies and into clusters of assemblies rich in interconnections. Vertically stacked packages form a rectangular parallelepiped having a plurality of parallel planar cooling fins projecting from two opposing surfaces and another pair of planar surfaces providing rectangular arrays of contacts to the enclosed integrated circuits. In addition, transverse contacts permit electrical interconnection of the stacked packages. Linear clusters can be aggregated as a linear array of such assemblies with their contact surfaces interconnected either directly by an anisotropically conducting plane or indirectly by an intervening transformation plane. In a preferred linear cluster, successive assemblies are rotated by 90° with respect to the axis of the array. In such clusters each package in the rotated assembly contacts each package in the neighboring assemblies. In low power equipment, elimination of the cooling fins permits even higher levels of interconnection such as rectangular clusters of assemblies.
摘要:
An integrated circuit package comprises a thermally conductive plate for receiving an integrated circuit and an open rectangular structure of conductor and insulator for surrounding the sides of the circuit and presenting one or more linear arrays of conductive connectors extending laterally through the rectangular structure. Preferably the rectangular structure also includes transverse contacts. Advantageously the plate includes extensions beyond the rectangular structure for acting as cooling fins on opposing sides of the rectangular structure. The linear arrays and cooling fins are preferably on different pairs of parallel sides. The integrated circuit package permits the aggregation of packages into assemblies and into clusters of assemblies rich in interconnections. Vertically stacked packages form a rectangular parallelepiped having a plurality of parallel planar cooling fins projecting from two opposing surfaces and another pair of planar surfaces providing rectangular arrays of contacts to the enclosed integrated circuits. In addition, transverse contacts permit electrical interconnection of the stacked packages. Linear clusters can be aggregated as a linear array of such assemblies with their contact surfaces interconnected either directly by an anisotropically conducting plane or indirectly by an intervening transformation plane. In a preferred linear cluster, successive assemblies are rotated by 90° with respect to the axis of the array. In such clusters each package in the rotated assembly contacts each package in the neighboring assemblies. In low power equipment, elimination of the cooling fins permits even higher levels of interconnection such as rectangular clusters of assemblies.
摘要:
This invention relates to an integrated circuit chip assembly wherein at least one integrated circuit chip (e.g., 46-48, 49) is attached to a substrate (e.g., 28) of a single crystal material, said at least one chip being electrically connected to lithographically connected circuitry (e.g., 50-54) on the substrate. The chips may be on top or on the bottom of the substrate or both, may be placed within wells or grooves in the substrate or may be placed above or below the wells or grooves via peripheral attachment of the chips. walls of the wells or grooves permit alignment by match-up with beveled edges of some chips. Circuitry may be also applied to the walls of some wells to permit connections to chips secured below the substrate.