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37 条记录 (耗时 0.016 秒)

    Selectable checking of message destinations in a switched parallel network
    22.
    发明公开
    Selectable checking of message destinations in a switched parallel network 失效
    选择性地检查切换的并行网络中的消息目的地。

    公开(公告)号：EP0610582A3

    公开(公告)日：1995-09-06

    申请号：EP93120303.8

    申请日：1993-12-16

    申请人： International Business Machines Corporation

    发明人： Feeney, James William ,  Jabusch, John David ,  Lusch, Robert Francis ,  Olnowich, Howard Thomas

    IPC分类号： H04L12/56

    CPC分类号： H04L12/1877 ,  H04L45/00

    摘要： A method and hardware apparatus provide a fault tolerant and flexible multi-stage network addressing scheme for transmitting a message with a header containing control bits for selecting from various destination checking functions to be performed. Upon arrival of the message at a node, destination checking is performed or not in response to the message's header. If destination checking is not performed, or if destination checking is performed and indicates that the node is the desired destination for the message, the message is accepted. If destination checking is performed and indicates that the node is not the desired destination for the message, the message is rejected. Destination checking is disabled during address assignment, broadcasting and multi-casting, and replaced with one's complement-based verification of the sending node.

    Multi-media serial line switching adapter for parallel networks and heterogeneous and homologous computer system
    24.
    发明公开
    Multi-media serial line switching adapter for parallel networks and heterogeneous and homologous computer system 失效
    用于并行网络和异构和同步计算机系统的多媒体串行线路切换适配器

    公开(公告)号：EP0505781A3

    公开(公告)日：1994-02-09

    申请号：EP92103748.7

    申请日：1992-03-05

    申请人： International Business Machines Corporation

    发明人： Olnowich, Howard Thomas

    IPC分类号： G06F15/16 ,  H04L29/06

    CPC分类号： H04L1/0057 ,  G06F11/261 ,  G06F15/17375 ,  G06F15/17393 ,  H04L7/0338 ,  H04L12/1881 ,  H04L49/101 ,  H04L49/1523 ,  H04L49/201 ,  H04L49/253 ,  H04L49/351 ,  H04L49/357 ,  H04L69/08 ,  H04L69/18 ,  H04Q11/0066 ,  H04Q11/0478

    摘要： A generic network device includes a serial line switching apparatus for performing either parallel or serial communications amongst multiple nodes over switching networks. An aspect includes is the adaptation of standard and proprietary serial interfaces using either optical or electrical transmission media to interface to the parallel switch. The converted serial data is routed to the selected destination through the parallel switch network, where it is received and converted back into a serial optical or electrical interface/protocol. Thus, the combination of the switching adapter and an ALLNODE parallel switching network make it feasible for serial message data to be switched and routed to various destinations. A a parallel electrical switch can efficiently handle either optical or electrical serial data and utilize information via wireless gateways to provide the features required for parallel processing and "farm" approaches, such as low latency, high bandwidth, scalability, fault tolerance, and high reliability. In addition, further flexibility is provided which permits the switching adapter to be personalized to support the any one of a number of standard and proprietary serial protocols. A personalisation PROM specifies the particular serial protocol that each individual adapter is to support. The parallel switching network becomes a flexible media that interconnects and allows different serial protocols to communicate with each other; i.e., any number of different serial protocols can interface with the same parallel switch network. This allows every node of the parallel system to send and receive messages using its own native protocol. However, a node is not restricted to communicating only with others nodes using the same protocol, but it can communicate with any of the other nodes regardless of the serial protocol they use. The switch enables generic networks with heterogeneous and/or homologous nodes as a computer system. It can replace LANs and WANs and provide high speed cluster switching. Applications include parallel processing with existing computers, and features of multiple processor computer system which transfer multi-media information from one or many senders to one or many receivers, useful in teaching and many other applications. The nodes of an asynchronous computer system are connected asynchronously in a non-blocking by search manner with connections for set up at 2 cycles per cascaded node and message transfer continues at maximum media transfer speed.

    Priority broadcast and multi-cast for unbuffered multi-stage network
    25.
    发明公开
    Priority broadcast and multi-cast for unbuffered multi-stage network 失效
    优先广播和多个不间断的多阶段网络

    公开(公告)号：EP0505780A3

    公开(公告)日：1993-11-03

    申请号：EP92103747.9

    申请日：1992-03-05

    申请人： International Business Machines Corporation

    发明人： Olnowich, Howard Thomas ,  Barker, Thomas Norman ,  Kogge, Peter Michael ,  Vandling III, Gilbert Clyde

    IPC分类号： G06F15/16 ,  H04L12/56

    CPC分类号： H04L1/0057 ,  G06F11/261 ,  G06F13/4022 ,  G06F15/17375 ,  G06F15/17393 ,  H04L7/0338 ,  H04L12/1881 ,  H04L49/15 ,  H04L49/1523 ,  H04L49/201 ,  H04L49/205 ,  H04Q11/0066 ,  H04Q11/0478

    摘要： Disclosed is a dual priority switching apparatus for making input port to output port connections on a requested basis quickly and dynamically, in a standard mode from any one of the input ports to any one of the output ports, in a multi-cast mode from any one of the input ports to a fixed number of subsets of multiple output ports simultaneously, or in a broadcast mode from any one of the input ports to all output ports simultaneously, using a new high priority approach to resolve either broadcast or multi-cast contention amongst input ports. The disclosed priority broadcast and multi-cast functions provide a more complex, yet faster and higher powered broadcast and multi-cast function. The disclosed invention permits multiple broadcasts to be queued at the individual switching apparatus which resolves the broadcast contention on a synchronous priority driven basis that permits one broadcast to follow the other at the earliest possible moment and the quickest possible speed. In addition, the present invention permits multiple multi-cast operations to occur simultaneously within in the network. This is becoming an increasingly important function for future massively parallel processors consisting of many nodes that can be subdivided into many tasks. The multi-cast function permits subsets of nodes assigned to the same tasks to communicate amongst themselves without involving other nodes that are not in its own subset. The present invention provides a network capable of sustaining many multi-casts simultaneously, thus, providing a very powerful tool for future parallel applications. In accordance with our inventions, we provide hardware circuitry for the detection and correction of deadlock conditions in the multi-stage network. Deadlock conditions are not expected to be usual conditions in the network, but there is a possibility of their occurrence resulting from multiple simultaneous broadcasts or multi-casts colliding within the network in a manner which is not resolvable. The hardware circuitry detects all the different types of deadlock conditions automatically and issues correction indications to the network paths involved. The network deadlock is thereby eliminated, and the two broadcasts or multi-casts involved continue their operation in a rearranged sequence that will not cause deadlock.

    Multi-sender/switching apparatus for status reporting over unbuffered asynchronous multi-stage networks
    26.
    发明公开
    Multi-sender/switching apparatus for status reporting over unbuffered asynchronous multi-stage networks 失效
    多发送者/非缓冲，异步多级网络的状态报告切换装置。

    公开(公告)号：EP0506135A2

    公开(公告)日：1992-09-30

    申请号：EP92105460.7

    申请日：1992-03-30

    申请人： International Business Machines Corporation

    发明人： Olnowich, Howard Thomas ,  Lusch, Robert Francis ,  Jabusch, John David

    IPC分类号： G06F15/16 ,  H04L12/56

    CPC分类号： H04L1/0057 ,  G06F11/261 ,  G06F13/4022 ,  G06F15/17375 ,  G06F15/17393 ,  H04L7/0338 ,  H04L12/1881 ,  H04L49/101 ,  H04L49/15 ,  H04L49/1523 ,  H04L49/201 ,  H04L49/205 ,  H04L49/254 ,  H04L49/40 ,  H04Q11/0066 ,  H04Q11/0478

    摘要： A multi-sender/switching apparatus provides a means applicable to performing either broadsender and multi-sender transfers over switching networks besides the standard network interconnections, such as point-to-point, broadcast, and multi-cast transfers. The new broadsender and multi-sender operations allow communicating over multi-stage networks, and are defined as the ability of all or multiple elements attached to the network to participate simultaneously in the same network operation on a joint basis. The system provides a capability unavailable over synchronous buffered and other types of networks. The combination of the broad-send and broadcast functions enable every element attached to an unbuffered multi-stage network to not only participate in a common network function, but to monitor the result at the same time. Likewise, through combining multi-send and multi-cast functions, multiple elements attached to the said multi-stage network can participate in a common network function and monitor the result at the same time. A multi-stage network can now perform a distributed arbitration function heretofore known only to multi-drop bus communication systems. The multi-sender/switch also incorporates a new asynchronous hand-shaking protocol that enables a positive feedback indication to be returned to the multiple senders of multi-cast or broadcast operations to inform them that the multi-sender operation is progressing correctly to all elements involved in the operation.

    摘要翻译： 一种多发射器/切换装置提供适用于在交换网络除了标准的网络互连，：如点至点，广播和多播传送执行要么广播发射机和多发送者传送的装置。 新的广播发射机和多发射机操作允许在多级网络的通信中，并且被定义为连接到网络的所有或多个元件的到同一网络的操作中同时参加一个联合的基础上的能力。 该系统提供了同步缓冲和其他类型的网络不可用的能力。 的广泛的发送和广播功能的组合使附连到在无缓冲的多级网络不仅参与共同的网络功能，但以监测在Sametime结果的每一个元素。 同样地，通过组合多发送和多播功能，多元件附接至所述多级网络可以参与共同的网络功能和监测在Sametime结果。 一种多级网络现在可以执行只知道多点总线通信系统中的分布式仲裁功能迄今。 多发送器/开关，以便采用了新的异步握手协议做了启用的正反馈指示被返回到多播或广播业务的多个发送者通知他们做了多发送者手术被正确地进展到所有元素 参与运作。

    All-node switch - an unclocked, unbuffered, asynchronous, switching apparatus
    27.
    发明公开
    All-node switch - an unclocked, unbuffered, asynchronous, switching apparatus 失效
    Schalterfüralle Knoten，ungepufferte asynchrone Schaltvorrichtung ohne Taktgeber。

    公开(公告)号：EP0505695A2

    公开(公告)日：1992-09-30

    申请号：EP92101705.9

    申请日：1992-02-03

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Franaszek, Peter Anthony ,  Georgiou, Christos John ,  Lusch, Robert Francis ,  Mosley, Joseph Michael ,  Olnowich, Howard Thomas

    IPC分类号： G06F15/16 ,  H04L12/56

    CPC分类号： H04L1/0057 ,  G06F11/261 ,  G06F13/4022 ,  G06F15/17375 ,  G06F15/17393 ,  H04L7/0338 ,  H04L49/101 ,  H04L49/15 ,  H04L49/1523 ,  H04L49/201 ,  H04L49/25 ,  H04L49/254 ,  H04L49/40 ,  H04L49/555 ,  H04Q11/0066 ,  H04Q11/0478

    摘要： Disclosed is an apparatus for switching input port connections to output port connections quickly and dynamically using a new asynchronous approach to resolve contention. The disclosed ALL-NODE (Asynchronous, Low Latency inter-NODE) Switch is self-routing in two cycle times at the same high speed serial rate that data is transferred through the switch. The normal mode of the switch requires absolutely no synchronization amongst any of the input and output ports which interface to the switch. The switch is completely completely void of centrally controlled clocking and any data buffering. Data traverses the switch only encountering three gate delays - on-chip receiver, mux, and off-chip driver. Contention is detected and resolved on chip, and yet the logic implementation is extremely simple and low in gate count, so the switch design is never gate limited. The protocol requires several parallel data lines plus two or three control lines.

    摘要翻译： 公开了一种用于使用新的异步方法快速和动态地将输入端口连接切换到输出端口连接以解决争用的装置。 所公开的ALL-NODE（异步，低延迟节点）交换机以两个周期的时间自动路由，以与数据通过交换机传输的高速串行速率相同。 交换机的正常模式在与交换机接口的任何输入和输出端口之间绝对不需要同步。 该交换机完全没有集中控制的时钟和任何数据缓冲。 数据通过开关只遇到三个门延迟 - 片上接收器，多路复用器和片外驱动器。 在芯片上检测和解决争用，但逻辑​​实现非常简单，门数很少，因此开关设计从不限制门限。 该协议需要几条并行数据线加上两条或三条控制线。

    Master microchannel apparatus for converting to switch architecture
    29.
    发明公开
    Master microchannel apparatus for converting to switch architecture 失效
    Master-Mikrochannelvorrichtung zur Unwandlung in Schalterarchitektur。

    公开(公告)号：EP0588030A2

    公开(公告)日：1994-03-23

    申请号：EP93111912.7

    申请日：1993-07-26

    申请人： International Business Machines Corporation

    发明人： Olnowich, Howard Thomas ,  Dotson, Michael Wayland ,  Feeney, James William ,  Fisher, Michael Hans ,  Jabusch, John David ,  Lusch, Robert Francis ,  Maniguet, Michael Anthony

    IPC分类号： G06F13/38 ,  G06F13/40 ,  H04L12/40

    CPC分类号： H04L12/40019 ,  G06F13/385 ,  G06F13/4022 ,  G06F15/17375 ,  H04L12/1881 ,  H04L12/40 ,  H04L12/40032 ,  H04L49/153

    摘要： Disclosed is a conversion apparatus that converts and adapts standard processor bus protocol and architecture, such as the MicroChannel (IBM Trade mark) bus, to more progressive switch interconnection protocol and architecture. The ivention extends existing the bus-based architecture to perform parallel and clustering functions by enabling the interconnection of thousands of processors. A conversion apparatus is disclosed for controlling the transfer of data messages from one nodal element across a switch network to another nodal element by using direct memory access capabilities controlled by intelligent bus masters. This approach does not require interactive support from teh processor at either nodal element during the message transmision, and frees up both processors to perform other tasks. In addition, the communication media is switch-based and is fully parallel, supporting n transmissions simultaneously, where n is the number of nodes interconnected by the switching network.

    摘要翻译： 公开了一种转换装置，其将诸如MicroChannel（IBM商标）总线的标准处理器总线协议和架构转换并适应于更渐进的交换机互连协议和体系结构。 该思想扩展了现有的基于总线的架构，通过启用数千个处理器的互连来执行并行和集群功能。 公开了一种转换装置，用于通过使用由智能总线主控器控制的直接存储器访问能力来控制数据消息从跨越交换机网络的一个节点传送到另一个节点元件的数据消息。 在消息传输期间，这种方法不需要来自处理器的交互式支持，并且释放两个处理器来执行其他任务。 另外，通信媒体是基于交换机的，并且完全并行，同时支持n个传输，其中n是由交换网络互连的节点数量。

    Multi-function network
    30.
    发明公开
    Multi-function network 失效
    多功能网络

    公开(公告)号：EP0505782A3

    公开(公告)日：1993-11-03

    申请号：EP92103761.0

    申请日：1992-03-05

    申请人： International Business Machines Corporation

    发明人： Olnowich, Howard Thomas ,  Barker, Thomas Norman ,  Frasaszek, Peter Anthony ,  Heidelberger, Philip ,  Rathi, Bharat Deep ,  Varma, Anujan Mangala

    IPC分类号： G06F15/16 ,  H04L12/56

    CPC分类号： H04L1/0057 ,  G06F11/261 ,  G06F13/4022 ,  G06F15/17375 ,  G06F15/17393 ,  H04L7/0338 ,  H04L12/1881 ,  H04L49/101 ,  H04L49/15 ,  H04L49/201 ,  H04L49/205 ,  H04L49/557 ,  H04Q11/0066 ,  H04Q11/0478

    摘要： A multi-stage switch architecture for providing for using a single switching component in multiplicity to create a single network capable of performing a multiplicity of functions. One function of the disclosed network is to circumvent the traditional blocking problems in multi-stage networks by implementing ALTERNATE PATHS between all N and M devices within the same network. This permits a non-blocked path between 2 devices to be found by "rearrangeability" - the act of trying or searching different alternate paths until a non-blocked connection is established. The rearrangeability architecture disclosed is implemented completely in hardware, and is performed automatically and transparently in relation to the software. A second network function permits the ALTERNATE PATHS to be used selectively for GUARANTEED DELIVERY - a special high priority mode of transfer which will guarantee that the connection will be made to an IDLE device as rapidly as possible, even when "Hot" spots in the network traffic patterns are encountered. In addition, the ALTERNATE PATHS provide another function of providing a more fault tolerant network than provided by state-of-the-art solutions. As a result of our inventions we provide a single, unidirectional, unbuffered, multi-stage network capable of doing the total network job consisting of multiple functions. The functional complexity provided usually requires several state-of -the-art multi-stage networks to perform the equivalent job. The single network disclosed here allows traffic in both directions, provides for non-blocking via ALTERNATE PATHS and REARRANGEABILITY, incorporates GUARANTEED DELIVERY and FAULT TOLERANCE, and yet is very compact and inexpensive to implement. In addition, the network is modular in nature and permits easy adaptation to any sized system.