Apparatus for optimizing gate bias of radio frequency amplifier and method thereof
    24.
    发明公开
    Apparatus for optimizing gate bias of radio frequency amplifier and method thereof 审中-公开
    一种用于优化RF放大器及其方法的栅极偏压的装置

    公开(公告)号:EP1783896A2

    公开(公告)日:2007-05-09

    申请号:EP06123459.7

    申请日:2006-11-03

    Inventor: Lee, Jong-Sung

    Abstract: Disclosed is an apparatus for maintaining the linearity of a Radio Frequency amplifier that includes a coupler (203) for coupling a signal input to a power amplifier (201), a gate bias controller (205) for determining a gate bias voltage in accordance with the signal level, and a power amplifier (201) for amplifying the input signal with the input signal maintained using the gate bias voltage received from the gate bias controller (205), making possible improved linearity of power amplifier output in an entire output region and increased Inter Modulation Distortion (IMD) cancellation when a pre-distorter is used. Since the linearity characteristic of the power amplifier is optimized despite reduction in output signal level of the power amplifier, it is possible to use one power amplifier for a single Frequency Allocation (FA) condition of a high output and a multi FA condition of a low output.

    Abstract translation: 公开了一种用于维护一射频放大器的线性度做了一个装置包括:用于在雅舞的信号输入耦合到功率放大器(201),栅极偏压控制器(205),用于确定的采矿的栅极偏置电压的耦合器(203) 信号电平,并用于与输入信号放大所述输入信号的功率放大器(201)使用从栅极偏压控制器(205)接收到的栅极偏压电压保持在NOM区域使得功率放大器的输出的可能的改善的线性和中增加 互调失真(IMD)消除当使用预失真器。 由于功率放大器的线性特性,尽管降低在功率放大器的输出信号电平进行优化,有可能使用一个功率放大器用于单个频率分配的高输出的(FA)条件和低的多FA条件 输出。

    POWER AMPLIFYING APPARATUS
    26.
    发明授权
    POWER AMPLIFYING APPARATUS 有权
    性能增强DEVICE

    公开(公告)号:EP1578011B1

    公开(公告)日:2007-02-07

    申请号:EP03811495.5

    申请日:2003-11-06

    CPC classification number: H03F3/2173 H03F1/0211 H03F1/3205 H03F2200/331

    Abstract: A power amplifying apparatus of switching type for performing, with a high degree of efficiency, a power amplification of input AC signals, such as an acoustic signal and the like, has first (11) and second (12) switch circuits to which a power supply voltage (Vc) is supplied; an inductor (13) and a load (14) that are connected between those switch circuits; and a control circuit (15) that receives an input AC signal (Vi), sets a predetermined ratio of ON interval to OFF interval, and drives the switch circuits. The control circuit (15) includes a calculating circuit (20) that multiplies a modulation sensitivity (e.g., the amplitude of a triangular wave voltage during production of a pulse signal for driving the switch circuits) by a ratio of the power supply voltage (Vc) to a DC component (Ec) thereof (Vc/Ec), and then outputs the resultant amplified value. This configuration compensates for distortion due to a ripple variation of the power supply voltage caused by a regenerative power or the like, and allows an adjustment of amplification factor by use of the power supply voltage.

    POWER AMPLIFYING APPARATUS
    28.
    发明公开
    POWER AMPLIFYING APPARATUS 有权
    性能增强DEVICE

    公开(公告)号:EP1578011A1

    公开(公告)日:2005-09-21

    申请号:EP03811495.5

    申请日:2003-11-06

    CPC classification number: H03F3/2173 H03F1/0211 H03F1/3205 H03F2200/331

    Abstract: A power amplifying apparatus which is of a switching type and capable of efficiently amplifying a power of an input AC signal such as an acoustic signal, includes a first switch circuit (11) and a second switch circuit (12) to which a power supply voltage Vc is applied, an inductor (13) and a load (14) which are connected between the switch circuits, and a control circuit (15) which receives an input AC signal Vi, sets a predetermined ratio of ON/OFF periods, and drives the switch circuits. The control circuit (15) includes an arithmetic circuit (20) which multiplies a modulation sensitivity (for example, an amplitude of a triangular wave voltage used for generation of a pulse signal for driving a switch circuit) by a ratio (Vc/Ec) of the power supply voltage Vc and a DC component Ec thereof. This configuration can compensate for distortion caused by a ripple variation of the power supply voltage due to regenerated power or the like, and enable a gain control by the power supply voltage.

    IMPROVED RF TRANSISTOR AMPLIFIER LINEARITY USING SUPPRESSED THIRD ORDER TRANSCONDUCTANCE
    29.
    发明公开
    IMPROVED RF TRANSISTOR AMPLIFIER LINEARITY USING SUPPRESSED THIRD ORDER TRANSCONDUCTANCE 有权
    使用禁止甲RF晶体管放大器改进线性跨导三阶

    公开(公告)号:EP1573908A1

    公开(公告)日:2005-09-14

    申请号:EP03768732.4

    申请日:2003-11-04

    CPC classification number: H03F3/602 H03F1/3205 H03F3/211

    Abstract: The linearity of a transistor amplifier comprising a plurality of transistors operating parallel is improved by reducing the odd order transconductance derivatives of signals generated by the transistors. The transistors can be provided in groups with each group having a different bias voltage applied thereto or each group of transistors can have a different input signal applied thereto. The groups of transistors can have different physical parameters suchas the width to length ratio of gates in field effect transistors and threshold voltages for the transistors.

    VARIABLE GAIN AMPLIFIER WITH AUTOBIASING SUPPLY REGULATION
    30.
    发明公开
    VARIABLE GAIN AMPLIFIER WITH AUTOBIASING SUPPLY REGULATION 审中-公开
    可变增益放大器的自偏压ENDER供应安排

    公开(公告)号:EP1523804A2

    公开(公告)日:2005-04-20

    申请号:EP02768983.5

    申请日:2002-10-04

    CPC classification number: H03F1/3205 H03F1/301 H03F3/19 H03F2200/72 H03G1/0023

    Abstract: A high-gain wide-band RF amplifier (120) with automatic bias supply regulation. Amplifier (120) includes a pair of field effect transistors (FETs) (102, 104) with common source connection (106) biased by FET (108) connected between common source connection (106) and amplifier signal input RFIN. Bias voltage 'VB1' is applied to the gate of device (108) and automatic gain control voltage 'VAGC' is applied to the gates of FET pair (102, 104). Automatic bias supply circuit (122) is an active load including resistors (124, 126), capacitor (128) and amplifier (130). Capacitor (128) is connected between the negative input (132) and output (134) of amplifier (130). Load reference voltage (VO) is provided to the positive input. Resistor (124) is connected between output (134) of amplifier (130) and the amplifier output (136) at the drain of FET (104). Resistor (126) is connected between output (136) at the drain of FET (104) and the negative input (132) to amplifier (130) providing amplifier load signal feedback.

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