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33 条记录 (耗时 0.013 秒)

    DC correction arrangement for an analogue to digital converter
    21.
    发明公开
    DC correction arrangement for an analogue to digital converter 失效
    校正装置，用于在一模拟 - 数字转换器的DC分量

    公开(公告)号：EP0709970A3

    公开(公告)日：1998-04-29

    申请号：EP95307498.6

    申请日：1995-10-20

    申请人： THE GENERAL ELECTRIC COMPANY, p.l.c.

    发明人： Joyce, Timothy R. ,  Thurston, Andrew M.

    IPC分类号： H03M3/02

    CPC分类号： H04L25/063 ,  H03M3/356 ,  H03M3/43 ,  H03M3/454

    摘要： An analogue to digital converter circuit arrangement comprising: an input (24) to receive an analogue signal, a first sampling means (9) operating at a first sampling frequency and operative to generate at an output (23) a digital signal; and a DC correction feedback path (10a) connected between the output (23) and the input (24). The DC correction feedback path comprising in order between the output (23) and input (24) means (25) for integrating said signal at the output (23), second sampling means (27) for sampling the integrated signal at a second sampling frequency which is a much lower frequency than said first sampling frequency, a digital to analogue converter (29) and means (31) for subtracting from the analogue signal received at the input (24) the analogue signal at the output of the digital to analogue converter.

    2-PHASE SWITCHED CAPACITOR FLASH ADC
    23.
    发明授权
    2-PHASE SWITCHED CAPACITOR FLASH ADC 审中-公开

    公开(公告)号：EP2962392B1

    公开(公告)日：2018-12-26

    申请号：EP14708423.0

    申请日：2014-02-20

    申请人： Microchip Technology Incorporated

    发明人： QUIQUEMPOIX, Vincent

    IPC分类号： H03K5/15

    CPC分类号： H03M3/34 ,  H03K5/15 ,  H03M1/00 ,  H03M1/12 ,  H03M1/804 ,  H03M3/30 ,  H03M3/322 ,  H03M3/356 ,  H03M3/422

    摘要： An input stage for a switched capacitor analog-to-digital converter has a differential voltage input receiving an input voltage, a differential reference voltage input receiving a chopped reference voltage, a common voltage connection, and a differential output. A pair of input capacitors is coupled between the differential voltage input and the differential output and a pair of reference capacitors is coupled between the differential reference voltage input. A switching unit is controlled by a first and second phase operable during the first phase to connect a first terminal of the input capacitors with the common voltage connection and couple the first terminal of the reference capacitors with the inverted differential voltage reference; and during a second phase to connect the first terminal of the input capacitors with the differential input voltage and couple the first terminal of the reference capacitors with the non-inverted differential voltage reference.

    OFFSET CANCELLATION FOR SAMPLED-DATA CIRCUITS
    27.
    发明公开
    OFFSET CANCELLATION FOR SAMPLED-DATA CIRCUITS 有权
    偏置衰减关于样本数据电路

    公开(公告)号：EP1999758A4

    公开(公告)日：2009-04-15

    申请号：EP07758608

    申请日：2007-03-15

    申请人： CAMBRIDGE ANALOG TECHNOLOGY LL

    发明人： LEE HAE-SEUNG

    IPC分类号： G11C27/02 ,  H03F1/30 ,  H03K5/00 ,  H03K17/00

    CPC分类号： H03H19/004 ,  G11C7/06 ,  G11C27/026 ,  H03M1/0607 ,  H03M1/403 ,  H03M1/442 ,  H03M3/356

    摘要： A comparator based circuit with effective offset cancellation includes first and second amplifiers and an offset capacitor operatively connected to the first and second amplifiers. An offset voltage source generates an offset voltage. A first switch connects the offset voltage source to ground during a first time period. The first amplifier generates an output voltage in response to the first switch connecting the offset voltage source to ground during the first time period. A second switch connects the offset capacitor to ground during a second time period. The first switch disconnects the offset voltage source from ground during a third time period, and the second switch disconnects the offset capacitor from ground during the third time period.

    Method and system for the indirect measurement of a physical value
    28.
    发明公开
    Method and system for the indirect measurement of a physical value 有权
    Verfahren und Vorrichtung zur indirekten Messung einer physikalischenGrösse

    公开(公告)号：EP1463205A1

    公开(公告)日：2004-09-29

    申请号：EP03447069.0

    申请日：2003-03-28

    申请人： AMI Semiconductor Belgium BVBA

    发明人： Horsky,Pavel ,  Koudar,Ivan

    IPC分类号： H03M3/02 ,  G01D3/02 ,  G01D5/12

    CPC分类号： G01D3/028 ,  H03M3/324 ,  H03M3/356

    摘要： The present invention provides a measurement method for measuring a physical value. The method comprises, during a same clock cycle, forming an input signal, a reference signal and an offset signal, the input signal including a parasitic value and a useful measurement value; deriving a relationship between the input signal where the parasitic value has been cancelled out, and the reference signal; and from this relationship, determining a value relating to the physical value. The input signal, reference signal and offset signal are respectively associated with an input element, a reference element and a parasitic element. All elements have a common driving signal, and the parasitic value is depending on the common driving signal. The fact that different signals are formed during a same measurement cycle, and that these signals are sufficient to obtain the desired physical value, makes the measurement method of the present invention faster than prior art measurement methods: only one conversion cycle is needed against two cycles needed for dual slope analog-to-digital conversion.
    The present invention also provides a system for measuring a physical value.

    摘要翻译： 本发明提供了一种用于测量物理值的测量方法。 该方法包括在同一时钟周期内形成输入信号，参考信号和偏移信号，所述输入信号包括寄生值和有用测量值; 导出寄生值已被抵消的输入信号与参考信号之间的关系; 并且从该关系中，确定与物理值相关的值。 输入信号，参考信号和偏移信号分别与输入元件，参考元件和寄生元件相关联。 所有元件均具有公共驱动信号，寄生值取决于公共驱动信号。 在相同测量周期内形成不同信号，并且这些信号足以获得所需物理值的事实使得本发明的测量方法比现有技术的测量方法更快：对于两个循环仅需要一个转换周期 需要双斜率模数转换。 本发明还提供了一种用于测量物理值的系统。