公开(公告)号：EP0602163A1

公开(公告)日：1994-06-22

申请号：EP92919601.0

申请日：1992-09-03

申请人： MITEL CORPORATION

发明人： MOLNAR, Gerald

IPC分类号： H03F3

CPC分类号： H03F3/45654 ,  H03F3/45192 ,  H03F3/45479 ,  H03F2203/45398 ,  H03F2203/45651 ,  H03F2203/45732

摘要： Un amplificateur de puissance comprend un étage d'entrée comportant un amplificateur entièrement différentiel avec des entrées et des sorties différentielles, et un circuit de contrôle du retour fonctionnant en boucle fermée et à haute impédance séparant les signaux de contrôle de retour en boucle fermée des sorties différentielles. L'étage de sortie de chaque sortie différentielle de l'étage d'entrée comprend un amplificateur de classe AB ayant des suiveurs de source s'interfaçant avec l'amplificateur entièrement différentiel. Un circuit de contrôle de la tension de sortie fonctionnant en mode commun maintient la tension de sortie en mode commun de l'amplificateur de classe AB à un niveau voulu. Un régulateur de courant de repos comprend un circuit reproduisant le comportement de l'un des suiveurs de source pour dériver un signal de régulation en maintenant le courant de repos des transistors de sortie à une valeur désirée.

公开(公告)号：EP1240761A2

公开(公告)日：2002-09-18

申请号：EP00984733.6

申请日：2000-12-18

申请人： Mitel Corporation

发明人： JIN, Gary, Qu

IPC分类号： H04L25/03 ,  H04L27/26

CPC分类号： H04L5/0046 ,  H04B3/46 ,  H04L5/0007 ,  H04L5/006 ,  H04L5/0062 ,  H04L25/03133 ,  H04L2025/03414 ,  H04L2025/03477

摘要： Data allocation takes into account the residal intersymbol and inter-subcarrier interference, which remains after the time-domain equaliser.

公开(公告)号：EP1130789A2

公开(公告)日：2001-09-05

申请号：EP01301829.6

申请日：2001-02-28

申请人： Mitel Corporation

发明人： Jin, Gary Q.

IPC分类号： H03M13/41

CPC分类号： H03M13/3905 ,  H03M13/23 ,  H03M13/41 ,  H03M13/6583

摘要： A method and apparatus for decoding convolutional codes used in error-correcting circuitry for digital data communication. To increase the speed and precision of the decoding process, the branch and/or state metrics are normalized during the soft decision calculations, whereby the dynamic range of the decoder is better utilized. Another aspect of the invention relates to decreasing the time and memory required to calculate the log-likelihood ratio by sending some of the soft decision values directly to a calculator without first storing them in memory.

摘要翻译： 一种用于解码用于数字数据通信的纠错电路中的卷积码的方法和装置。 为了提高解码处理的速度和精度，在软判决计算期间对分支和/或状态度量进行归一化，从而更好地利用解码器的动态范围。 本发明的另一方面涉及通过将一些软判决值直接发送到计算器而不先将其存储在存储器中来减少计算对数似然比所需的时间和存储器。

公开(公告)号：EP1111880A2

公开(公告)日：2001-06-27

申请号：EP00311023.6

申请日：2000-12-11

申请人： Mitel Corporation

发明人： Ching, Philip

IPC分类号： H04M1/56

CPC分类号： H03L7/085 ,  H03L7/095 ,  H03L7/0994 ,  H03L7/146 ,  H03L7/18 ,  H04J3/0632 ,  H04J3/0688 ,  H04J3/0697 ,  H04L2012/5616 ,  H04L2012/5652

摘要： The invention relates to packet switched networks, and more particularly to a circuit and a method for clock recovery in cell-relay networks, particularly ATM (Asynchronous Transfer Mode) networks offering constant bit rate services. The multimode clock recovery circuit has an embedded digital phase locked loop including an input circuit capable of generating a phase signal from at least two types of input signal. The phase signal controlling the output of the phase locked loop generates clock signals for the constant bit rate services.

摘要翻译： 本发明涉及分组交换网络，更具体地说，涉及一种在小区中继网络中，特别是提供恒定比特率服务的ATM（异步传输模式）网络中的时钟恢复的电路和方法。 多模时钟恢复电路具有嵌入式数字锁相环，其包括能够从至少两种类型的输入信号产生相位信号的输入电路。 控制锁相环输出的相位信号产生恒定比特率服务的时钟信号。

公开(公告)号：EP0769225B1

公开(公告)日：1999-09-22

申请号：EP95923162.2

申请日：1995-07-06

申请人： MITEL CORPORATION

发明人： REESOR, Gordon, J.

IPC分类号： H03M7/00

CPC分类号： H03M7/3046

摘要： A circuit for applying a predetermined algorithm to an input signal, comprises an input for receiving the input signal, a signal processing device for processing the input signal in accordance with the predetermined algorithm, and a device for outputting the processed signal, the signal processing device comprising distributed bit-serial logic circuits to implement the predetermined algorithm.

公开(公告)号：EP0729693B1

公开(公告)日：1999-06-09

申请号：EP95900588.5

申请日：1994-11-18

申请人： MITEL CORPORATION

发明人： PERES, Mauricio ,  ROBERTS, Mel

IPC分类号： H04Q11/04 ,  H04L12/66

CPC分类号： H04Q11/0478 ,  H04L2012/5615

摘要： An interface device serving as a bridge between a telephone-based bus with a plurality of TDM channels and a high speed data network to permit mixed data, voice, and video signals to be exchanged between the telephone bus and the data network, comprises a serial port for connection to the telephone bus; a parallel port for connection to the high speed data network; a bidirectional serial-to-parallel/parallel-to-serial converter connected to the serial port; and a rate converter circuit between the bidirectional converter and said parallel port, the rate converter circuit including a time-slot interchange device to permit rate adaptation with constant throughput delay and switching between the TDM channels.

公开(公告)号：EP0817430A3

公开(公告)日：1999-03-24

申请号：EP97304462.1

申请日：1997-06-25

申请人： MITEL CORPORATION

发明人： Peres, Mauricio ,  Salemi, Hojjat ,  Laurence, Michel

IPC分类号： H04L12/56 ,  H04Q11/04

CPC分类号： H04L12/5602 ,  H04L2012/5651 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04Q11/0478

摘要： A method of controlling the supply of cells into an asynchronous network, comprises the steps of storing incoming bytes from multiple channels in respective channel buffers, creating in memory a timing event wheel partitioned into a plurality of sectors, of which one is active at any time, and placing cell pointers in the sectors. The cell pointers identify channel buffers and are distributed around the wheel in accordance with a desired transmission schedule. The wheel is stepwise advanced at a predetermined rate, and the cell pointers in the active sector are scanned at each advance of the wheel to identify the corresponding channel buffers. The bytes from the identified channel buffers are assembled into cells, which are forwarded for transmission over the asynchronous network. These are then multiplexed with VBR cells from another source.

公开(公告)号：EP0855737A3

公开(公告)日：1998-12-23

申请号：EP97310627.1

申请日：1997-12-24

申请人： MITEL CORPORATION

发明人： Ouellet, Luc ,  Azelmad, Abdallah

IPC分类号： H01L21/033 ,  H01L21/31

CPC分类号： H01L21/76802 ,  H01L21/31144 ,  Y10S438/942

摘要： A method of fabricating a semiconductor device includes etching hcles through at least one deposited layer to an underlying structure. A hard mask is deposited on an upper surface of a device to be etched, the mask is patterned with the aid of a photoresist and holes are etched in the hard mask. After removal of the photoresist, contact or via holes are etched through the patterned hard mask in the deposited layer(s) to reach the underlying structure.

摘要翻译： 制造半导体器件的方法包括通过至少一个沉积层将腐蚀孔蚀刻到下面的结构。 硬掩模沉积在要蚀刻的器件的上表面上，借助于光致抗蚀剂对掩模进行图案化，并且在硬掩模中蚀刻孔。 在除去光致抗蚀剂之后，通过沉积层中的图案化硬掩模蚀刻接触孔或通孔，以到达下面的结构。

公开(公告)号：EP0856212A1

公开(公告)日：1998-08-05

申请号：EP96933290.0

申请日：1996-10-16

申请人： MITEL CORPORATION

发明人： MILLER, John ,  TULAI, Alexander

IPC分类号： H04B3

CPC分类号： H04B3/23

摘要： A phase reversal detector comprises a circuit for receiving an input signal subject to occasional phase reversals, a circuit for generating signals representing the quadrature components thereof, and a circuit responsive to a migration in the quadrature plane of the position of the quadrature components by an amount greater than a predetermined threshold to generate a signal indicative of a valid phase reversal. The detector is capable of exceeding the requirements of ITU standard G.165, and yet is simple to implement and works over a large dynamic range.

公开(公告)号：EP0754397B1

公开(公告)日：1998-08-05

申请号：EP95914259.7

申请日：1995-04-04

申请人： MITEL CORPORATION

发明人： GRAY, Tom ,  DE KORTE, Lee ,  PERES, Mauricio

IPC分类号： H04Q11/04 ,  H04L12/43

CPC分类号： H04Q11/0478 ,  H04L12/43 ,  H04L2012/5612 ,  H04L2012/5614

摘要： A telecommunications system comprises a plurality of servers interconnected by a TDM backbone and able to share a common channel or bandwith. An arrangement for sending messages or files between said servers comprises a master node for sending a continuous stream of cells round the backbone, each cell having a header portion and a payload portion, and a plurality of downstream nodes which upon arrival of incoming cells insert information therein, read information therefrom, or allow the cells to pass thereby unaltered.