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公开(公告)号:EP4177943A1
公开(公告)日:2023-05-10
申请号:EP21834198.0
申请日:2021-06-24
申请人: Amosense Co.,Ltd
发明人: LEE, Jihyung , CHO, Taeho , YEO, Intae , BIN, Jinhyuck , PARK, Seunggon
IPC分类号: H01L23/373 , H01L23/00 , H01L23/15 , H01L23/485 , H01L23/482 , H05K1/03 , H01L23/13
摘要: The present invention relates to a power module and a method for manufacturing same, the power module including: a lower ceramic substrate; an upper ceramic substrate which is disposed spaced apart from the upper portion of the lower ceramic substrate, and on the lower surface of which a semiconductor chip is mounted; spacers each having one end bonded to the lower ceramic substrate and the other end bonded to the upper ceramic substrate; first bonding layers each bonding the one end of each spacer to the lower ceramic substrate; and second bonding layers each bonding the other end of each spacer to the upper ceramic substrate. The present invention maintains a constant distance between the lower ceramic substrate and the upper ceramic substrate by having the spacers arranged therebetween, and thus is advantageous in that the semiconductor chip can be protected and heat dissipation efficiency can be increased.
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公开(公告)号:EP3556015B1
公开(公告)日:2023-04-26
申请号:EP17881614.6
申请日:2017-12-15
发明人: CURBOW, Austin , MARTIN, Daniel
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公开(公告)号:EP3327731B1
公开(公告)日:2023-04-19
申请号:EP16830786.6
申请日:2016-07-25
发明人: JEONG, Hye Won , SON, Yong Goo , KIM, Kyungjun , SHIN, Bo Ra , LIM, Chang Yoon
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公开(公告)号:EP4164346A2
公开(公告)日:2023-04-12
申请号:EP22205517.0
申请日:2017-04-11
申请人: TactoTek Oy
IPC分类号: H05K5/00 , H05K3/28 , H05K1/03 , H05K1/14 , H01L23/522 , H01L23/538 , B29C39/12 , B29C45/16 , B32B27/08 , G06F3/044 , B32B17/10 , H01L21/56 , H05K1/02 , H05K1/18 , H05K3/40 , H05K3/46 , B32B3/06 , B32B3/26 , B32B3/30 , B32B5/02 , B32B5/26
摘要: An integrated multilayer assembly (100, 200, 300) for an electronic device comprising a first substrate film (106) configured to accommodate electrical features on at least first side thereof, said first substrate film having the first side and a substantially opposing second side, a second substrate film (202) configured to accommodate electrical features on at least first side thereof, said second substrate film having the first side and a substantially opposing second side, the first sides of the first and second substrate films being configured to face each other, at least one electrical feature (214B) on the first side of the first substrate film, at least one other electrical feature (214A) on the first side of the second substrate film, and a molded plastic layer (204) between the first and second substrate films at least partially embedding the electrical features on the first sides thereof. A related method of manufacture is presented.
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公开(公告)号:EP4152380A1
公开(公告)日:2023-03-22
申请号:EP21804037.6
申请日:2021-05-11
申请人: Amosense Co.,Ltd
发明人: KIM, Jonguk , BIN, Jinhyuck , CHO, Taeho , PARK, Seunggon , YEO, Intae
IPC分类号: H01L23/498 , H01L23/15 , H01L23/492 , H05K1/03 , H05K1/11 , H01L23/367 , H01L23/373 , H01L23/48 , H05K7/20
摘要: The present invention relates to a power module and a method for manufacturing same, the power module comprising: a ceramic substrate (300) including a ceramic base and an electrode pattern formed on the upper and lower surfaces of the ceramic base; a PCB substrate (400) disposed above the ceramic substrate (300) and including an electrode pattern; a plurality of through-holes (320) formed in at least one of the ceramic substrate (300) and the PCB substrate (400); and a connection pin (900) coupled to the through-holes (320) and connecting the electrode pattern of the ceramic substrate (300) and the electrode pattern of the PCB substrate (400) to each other. The present invention has advantages in that it is easy to fix the connection pin to the ceramic substrate, the position accuracy of the connection pin is improved, and the convenience of assembly is increased.
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47.
公开(公告)号:EP4149216A1
公开(公告)日:2023-03-15
申请号:EP22191864.2
申请日:2022-08-24
IPC分类号: H05K1/02 , H05K3/12 , H05K3/28 , H05K3/46 , H05K1/03 , H05K1/05 , H05K3/32 , H05K3/34 , H05K1/16 , H05K1/11
摘要: Ein elektrisches Schaltungsbauteil weist einen Träger mit einer Oberseite, einer Kontaktbahn und einem mit der Kontaktbahn verbundenen Kontaktfeld auf, die einstückig miteinander verbunden und in einem Schritt hergestellt sind und die auf der Oberseite des Trägers angeordnet sind. Das Kontaktfeld weist eine Oberseite und lateral umgebende Außenseiten auf. Auf der Oberseite des Trägers ist eine Beschichtung aufgebracht, die mindestens einen Teil der Oberseite des Trägers bedeckt. Die Beschichtung reicht entlang aller Außenseiten des Kontaktfelds mindestens an das Kontaktfeld heran und bedeckt das Kontaktfeld zumindest an den Außenseiten und auch in einem Randbereich. Beim Anlöten eines Anschlusses wird dann die restliche Oberfläche des Kontaktfelds von Lot bedeckt.
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公开(公告)号:EP3715393B1
公开(公告)日:2023-03-08
申请号:EP18896961.2
申请日:2018-12-18
发明人: TOSHIMITSU, Kenichi , NAKAMURA, Yoshihiko , FUJISAWA, Hiroyuki , TUMURAYA, Yuuji , YAMAUCHI, Akihiro , SHINPO, Takashi
IPC分类号: C08F290/06 , B32B27/00 , C08J5/24 , H05K1/03 , C08G65/48
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公开(公告)号:EP4140702A2
公开(公告)日:2023-03-01
申请号:EP22195800.2
申请日:2017-03-06
申请人: Kuraray Co., Ltd.
摘要: The present invention relates to a metal-clad laminate comprising a thermoplastic liquid crystal polymer film and a metal sheet(s) bonded to at least one surface of the thermoplastic liquid crystal polymer film, wherein the metal sheet has a surface with a ten-point average roughness (Rz) of 5.0 µm or less to be bonded to the thermoplastic liquid crystal polymer film, a peel strength of the thermoplastic liquid crystal polymer film from the metal sheet bonded to the thermoplastic liquid crystal polymer film is 0.7 kN/m or greater, and an average number of blisters generated per 1 m 2 is 20 or less, in which the average number of blisters generated per 1 m 2 is measured by, observing a surface (10 m 2 ) of the metal-clad laminate by using a camera, and detecting difference in brightness by reflection of the film surface from a light source, followed by image processing.
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公开(公告)号:EP3456779B1
公开(公告)日:2023-03-01
申请号:EP17796260.2
申请日:2017-05-15
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