公开(公告)号：EP4401128A3

公开(公告)日：2024-10-02

申请号：EP24179436.1

申请日：2018-03-15

申请人： KABUSHIKI KAISHA TOSHIBA ,  Toshiba Materials Co., Ltd.

发明人： NABA, Takayuki ,  YANO, Keiichi ,  KATO, Hiromasa

IPC分类号： H01L23/28 ,  H01L23/12 ,  H01L23/13 ,  H01L23/36 ,  H05K1/02 ,  H05K3/28 ,  H01L23/24 ,  H01L23/053 ,  H01L23/31 ,  H01L23/373

CPC分类号： H01L23/3735 ,  H01L23/24 ,  H01L23/053 ,  H01L23/3142

摘要： According to one embodiment, a ceramic metal circuit board is a ceramic metal circuit board formed by bonding metal circuit plates to at least one surface of a ceramic substrate. At least one of the metal circuit plates has an area of not less than 100 mm2 and includes a concave portion having a depth of not less than 0.02 mm within a range of 1% to 70% of a surface of the at least one of the metal circuit plates. The concave portion is provided not less than 3 mm inside from an end of the metal circuit plate. An area to provide the concave portion may fall within a range of 3% to 70% of one metal circuit plate surface.

公开(公告)号：EP4426075A1

公开(公告)日：2024-09-04

申请号：EP22886798.2

申请日：2022-10-18

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Materials Co., Ltd.

发明人： KATO, Hiromasa ,  SANO, Takashi

IPC分类号： H05K1/03 ,  H01L23/13

CPC分类号： H05K1/03 ,  H01L23/13

摘要： A ceramic copper circuit board according to one embodiment of the present invention is provided with: a ceramic substrate; and a copper circuit part that is bonded to at least one surface of the ceramic substrate, with a brazing material layer being interposed therebetween. The brazing material layer contains Cu, Ti, and one or two elements that are selected from among Sn and In. The brazing material layer comprises: a bonding part that is provided between the ceramic substrate and the copper circuit part; and a first protrusion part that is provided around the bonding part, and has a titanium content within the range from 70% by mass to 100% by mass. It is preferable that the sum of the titanium content and the nitrogen content in the first protrusion part is within the range from 99% by mass to 100% by mass.

公开(公告)号：EP4391029A1

公开(公告)日：2024-06-26

申请号：EP23216781.7

申请日：2023-12-14

申请人： NXP USA, Inc.

发明人： Roberts, Jeffrey Spencer ,  Wang, Lu ,  Santos, Fernando A.

IPC分类号： H01L21/48 ,  H01L23/13 ,  H01L23/36 ,  H01L23/367 ,  H01L23/433 ,  H01L23/538 ,  H01L23/66 ,  H03F1/02 ,  H03F1/22 ,  H03F1/52 ,  H03F3/195 ,  H05K1/02

CPC分类号： H01L23/66 ,  H01L2223/665520130101 ,  H01L23/3677 ,  H01L23/36 ,  H01L23/13 ,  H01L23/4334 ,  H01L23/5383 ,  H01L23/5385 ,  H03F1/0288 ,  H03F3/195 ,  H05K1/0204 ,  H01L21/4871 ,  H03F3/245 ,  H03F3/211 ,  H01L2223/66520130101

摘要： An amplifier module includes a module substrate with a mounting surface, and a thermal dissipation structure that extends through the module substrate. A ground contact of a power transistor die is coupled to a surface of the thermal dissipation structure. Encapsulant material covers the mounting surface of the module substrate and the power transistor die, and a surface of the encapsulant material defines a contact surface of the amplifier module. A ground terminal is embedded within the encapsulant material. The ground terminal has a proximal end coupled to the thermal dissipation structure, and a distal end exposed at the contact surface. The ground terminal is electrically coupled to the ground contact of the power transistor die through the thermal dissipation structure.

公开(公告)号：EP4383562A1

公开(公告)日：2024-06-12

申请号：EP23212530.2

申请日：2023-11-28

申请人： NXP USA, Inc.

发明人： Hiemstra, Stephen Reza ,  Wang, Lu ,  English, Joshua Bennet

IPC分类号： H03F1/02 ,  H03F3/195 ,  H01L23/66 ,  H01L23/367 ,  H01L23/36 ,  H01L23/433 ,  H05K1/02 ,  H01L23/13 ,  H01L23/538

CPC分类号： H03F1/0288 ,  H03F3/195 ,  H01L23/66 ,  H01L2223/664420130101 ,  H01L23/3677 ,  H01L23/36 ,  H01L23/4334 ,  H05K1/0204 ,  H01L23/13 ,  H01L23/5385 ,  H03F2200/41120130101 ,  H01L2223/665520130101 ,  H01L2223/666120130101 ,  H01L28/00

摘要： A power amplifier module includes a module substrate. First and second heat dissipation structures extend through the module substrate, and each has a first surface exposed at a mounting surface of the module substrate, and a second surface exposed at a bottom surface of the module substrate. The first surfaces of the first and second heat dissipation structures are physically separated by a portion of the mounting surface. First and second amplifier dies are coupled to the first surface of the first heat dissipation structure. The first amplifier die includes a first power transistor that functions as a driver amplifier. The second amplifier die includes a second power transistor that functions as a first final amplifier. The third amplifier die is coupled to the first surface of the second heat dissipation structure, and the third amplifier die includes a third power transistor that functions as a second final amplifier.

公开(公告)号：EP4342614A1

公开(公告)日：2024-03-27

申请号：EP22804680.1

申请日：2022-05-17

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Materials Co., Ltd.

发明人： KATO, Hiromasa ,  HOSHINO, Masanori ,  HIRABAYASHI, Hideaki ,  SUENAGA, Seiichi ,  MORIMOTO, Kazumitsu

IPC分类号： B23K1/00 ,  B23K1/008 ,  B23K1/19 ,  H01L23/13 ,  B32B15/04 ,  B32B15/20 ,  C04B37/02 ,  H05K3/38

摘要： A bonded object production method according to one embodiment of the present invention involves performing, by using continuous furnace, a process on a laminate that includes a metallic member, a ceramic member, and a brazing material layer disposed therebetween while conveying the laminate. The bonded object production method is characterized by comprising: a step for heating the laminate in an inert atmosphere from 200°C to a bonding temperature at an average temperature increase rate of at least 15°C/min; a step for bonding the laminate in an inert atmosphere at the bonding temperature within a range of 600-950°C; and a step for cooling the laminate from the bonding temperature down to 200°C at an average temperature decrease rate of at least 15°C/min. In addition, the ceramic substrate is preferably a silicon nitride substrate.

公开(公告)号：EP4125115B1

公开(公告)日：2024-03-20

申请号：EP22186640.3

申请日：2022-07-25

发明人： PENG, Hao ,  LIAO, Xiaojing ,  HOU, Zhaozheng

IPC分类号： H01L21/48 ,  H01L25/00 ,  H01L25/065 ,  H01L23/367 ,  H01L23/552 ,  H01L23/538 ,  H01L23/14 ,  H01L23/13 ,  H01L23/36

公开(公告)号：EP4312256A1

公开(公告)日：2024-01-31

申请号：EP23185793.9

申请日：2023-07-17

申请人： NXP B.V.

发明人： FANG, Tzu Ya ,  LIN, Yen-Chih ,  CHEN, Jian Nian ,  LEE, Ming Wei ,  XIE, Yi Xiu ,  TAN, Vanessa Wyn Jean ,  CHANG, Yao Jung ,  TSI, Yi-Hsuan ,  SHEN, Xiu Hong ,  HUANG, Kuan Lin

IPC分类号： H01L23/31 ,  H01L23/13 ,  H01L23/00 ,  H01L21/56 ,  H01L21/98 ,  H01L25/065 ,  H01L23/538

摘要： A method of manufacturing a semiconductor device is provided. The method includes placing a package substrate on a carrier substrate, forming a frame on the package substrate, and affixing an active side of a semiconductor die on the package substrate. The semiconductor die together with the frame and the package substrate form a cavity between the semiconductor die and the package substrate. At least a portion of the semiconductor die and the package substrate are encapsulated with an encapsulant. The frame is configured to prevent the encapsulant from entering the cavity.

公开(公告)号：EP4015486B1

公开(公告)日：2024-01-17

申请号：EP20854862.8

申请日：2020-08-05

发明人： YAMAGATA Toshitaka ,  MORI Kazuhisa ,  KOMIYA Katsuhiro

IPC分类号： C04B35/587 ,  C04B37/02 ,  C04B41/91 ,  H01L23/13 ,  H01L23/15 ,  H05K1/03 ,  H05K3/38 ,  C04B35/111 ,  C04B35/565 ,  C04B35/581 ,  C04B35/583 ,  C04B35/645 ,  C04B41/53

公开(公告)号：EP3531448B1

公开(公告)日：2024-01-17

申请号：EP19158006.7

申请日：2019-02-19

发明人： BARTLEY, Eileen A.

IPC分类号： H01L23/055 ,  H01L21/56 ,  H01L23/13 ,  H01L23/20 ,  H01L23/31

公开(公告)号：EP4297076A1

公开(公告)日：2023-12-27

申请号：EP22756097.6

申请日：2022-02-10

申请人： KABUSHIKI KAISHA TOSHIBA ,  Toshiba Materials Co., Ltd.

发明人： NABA, Takayuki ,  YANO, Keiichi ,  KATO, Hiromasa

IPC分类号： H01L23/13 ,  H01L23/29 ,  H01L23/31 ,  H05K3/38

摘要： A ceramic circuit board includes a ceramic substrate and a metal plate bonded together via a bonding layer, wherein when the ceramic circuit board is observed through a cross-section defined by a thickness direction and lateral direction of the ceramic circuit board: a side surface of the metal plate has an inclined shape; and the bonding layer has a bonding-layer protruding portion which protrudes by 20 µm or more and 150 µm or less from an edge where the bonding layer is in contact with the side surface of the metal plate. The shape and Vickers hardness of the side surface of the metal plate are controlled. The ceramic substrate is preferably a silicon nitride substrate.