公开(公告)号：EP2002553A2

公开(公告)日：2008-12-17

申请号：EP07754386.6

申请日：2007-03-29

Applicant: Silicon Laboratories Inc.

Inventor： DER, Lawrence ,  TUTTLE, George, T. ,  PIOVACCARI, Alessandro ,  XIN, Chunyu ,  HABAN, Scott ,  ELENES, Javier ,  KASHA, Dan ,  VANCORENLAND, Peter

IPC: H04B1/40

CPC classification number: H04B1/40 ,  H03M3/398 ,  H03M3/40 ,  H03M3/448 ,  H03M3/452 ,  H03M3/50

Abstract: A transceiver includes a processor and an analog-to-digital converter. The processor is adapted to in a transmit mode of the transceiver, generate a modulated signal in response to a first digital signal. In a receive mode of the transceiver, the processor is adapted to generate a demodulated signal in response to a second digital signal. The analog-to-digital converter provides the first digital signal in the transmit mode and provides the second digital signal in the receive mode.

公开(公告)号：EP2002537A2

公开(公告)日：2008-12-17

申请号：EP07754387.4

申请日：2007-03-29

Applicant: Silicon Laboratories Inc.

Inventor： RAFI, Aslamali, A. ,  TUTTLE, George, T. ,  DER, Lawrence

IPC: H03C3/40

CPC classification number: H03C3/40

Abstract: A technique includes digitally generating orthogonal modulated signals, each of which has spectral energy that is generally centered at an intermediate frequency. The orthogonal modulated signals are frequency translated to produce translated signals, each of which has spectral energy that is generally centered about a second frequency that is higher than the intermediate frequency. The translated signals are combined to generate a modulated signal.

公开(公告)号：EP1766793B1

公开(公告)日：2008-09-03

申请号：EP05763256.4

申请日：2005-06-23

Applicant: Silicon Laboratories, Inc.

Inventor： TUTTLE, G. Tyson ,  KASHA, Dan B.

IPC: H04B1/28

CPC classification number: H04B1/18 ,  H04B1/30

Abstract: An integrated low-IF (low intermediate frequency) terrestrial broadcast receiver and associated method are disclosed that provide an advantageous and cost-efficient solution. The integrated receiver includes a mixer, local oscillator generation circuitry, low-IF conversion circuitry, and DSP circuitry. And the integrated receiver is particularly suited for small, portable devices and the reception of terrestrial audio broadcasts, such as FM and AM terrestrial audio broadcast, in such portable devices.

公开(公告)号：EP1929633A1

公开(公告)日：2008-06-11

申请号：EP06803481.8

申请日：2006-09-12

Applicant: Silicon Laboratories Inc.

Inventor： MAXIM, Adrian ,  KAO, James

IPC: H03L7/16

CPC classification number: H03L7/0896 ,  H03L7/0893 ,  H03L7/18 ,  H03L7/193

Abstract: A frequency synthesizer includes analog components and digital components. The frequency synthesizer includes at least one shunt regulator that is coupled to a supply rail to provide power to at least one of the digital components. The frequency synthesizer also includes at least one series regulator that is coupled to the supply rail to provide power to at least one of the analog components.

公开(公告)号：EP1925077A1

公开(公告)日：2008-05-28

申请号：EP06814487.2

申请日：2006-09-12

Applicant: Silicon Laboratories Inc.

Inventor： VANCORENLAND, Peter ,  LIM, Lysander ,  MARQUES, Augusto M. ,  WILLINHAM, Scott D.

IPC: H03J3/18 ,  H03B5/12 ,  H03L7/099

CPC classification number: H03J3/185 ,  H03B5/1243 ,  H03B5/1293 ,  H03B2200/0062 ,  H03B2201/0208 ,  H03B2201/0266 ,  H03J7/10 ,  H03J2200/36 ,  H03L7/099

Abstract: An oscillator includes a plurality of varactor cells to receive a control signal to control a frequency of the oscillator. Each of the varactor cells includes a switch that includes a first terminal to receive the control signal and a second terminal such that the switch operates to control a capacitance of the varactor cell in response to a voltage between the first and second terminals. The oscillator includes a bias circuit to provide a different bias voltage to each second terminal and an amplifier that is coupled to the varactor cells to generate an oscillating signal.

公开(公告)号：EP1897219A1

公开(公告)日：2008-03-12

申请号：EP06785814.2

申请日：2006-06-29

Applicant: Silicon Laboratories, Inc.

Inventor： SRINIVASAN, Vishnu, S. ,  TUTTLE, G., Tyson ,  KASHA, Dan, B. ,  PIOVACCARI, Allessandro

IPC: H03G3/30 ,  H04B1/10

CPC classification number: H04B1/30 ,  H03G3/3068 ,  H04B1/0003 ,  H04B1/109

Abstract: An apparatus includes a semiconductor package, a radio receiver and a processor. The radio receiver is located in the semiconductor package and includes at least one gain stage. The processor is located in the semiconductor package to execute stored instructions to control the gain stage(s).

公开(公告)号：EP1877890A1

公开(公告)日：2008-01-16

申请号：EP05855878.4

申请日：2005-12-28

Applicant: Silicon Laboratories, Inc.

Inventor： RUSH, Frederick, A. ,  KULKARNI, Satish, S.

IPC: G06F1/32 ,  H04B1/16 ,  H04B15/00

CPC classification number: H04B1/3816 ,  H04B1/401 ,  H04W52/0287 ,  Y02D70/1222 ,  Y02D70/1224 ,  Y02D70/1226 ,  Y02D70/21 ,  Y02D70/40

Abstract: A communication apparatus including a radio frequency (RF) circuit coupled to a digital processing circuit and an interface circuit coupled to an authentication device. The RF circuit may be configured to operate on a radio frequency signal. A portion of the digital processing circuit may be disabled during an active mode of operation of the RF circuit. The interface circuit may be configured to buffer data communicated between the digital processing circuit and an authentication device during the active mode of operation of the RF circuit. In one embodiment, the interface circuit includes a memory and memory control logic to buffer data available for transmission to and/or received from the authentication device. In some embodiments, the digital processing circuit includes a processing unit configured to process authentication data received from the authentication device. In these and other embodiments, the authentication device may be a subscriber identity module (SIM).

公开(公告)号：EP1769312A2

公开(公告)日：2007-04-04

申请号：EP05768163.7

申请日：2005-06-29

Applicant: Silicon Laboratories, Inc.

Inventor： FERNALD, Kenneth, W. ,  ALFANO, E., Donald

IPC: G06F1/26

CPC classification number: G06F1/3203

Abstract: A microcontroller unit (MCU) is disclosed with a stand-alone Real Time Clock (RTC). The MCU includes a processing circuit for receiving digital information and processing said received digital information. A primary clock circuit provides the timing for the processing circuit. A power control circuit controls the power to the processing circuit and the primary clock circuit to control the operation thereof to operate in at least a full power mode drawing a full power level from a supply voltage input and a reduced power mode drawing less than the full power level from the supply voltage input. A stand-alone RTC circuit is also provided, the stand­alone RTC circuit including an RTC clock circuit operating independent of the primary clock circuit. A timer clocked by the RTC clock circuit is operable to increment a stored time value for output therefrom, the RTC clock circuit having a defined time base. An input/output (I/O) device provides access by the processing circuit to the results output by the timer. A power management circuitry manages the power to the stand-alone RTC circuit, such that the RTC clock circuit, the timer, and the I/O device operate regardless of the power mode of operation of the processing circuitry and the primary clock circuit.

公开(公告)号：EP1766630A2

公开(公告)日：2007-03-28

申请号：EP05764329.8

申请日：2005-06-29

Applicant: Silicon Laboratories, Inc.

Inventor： DAVID, Thomas, Saroshan ,  HIGHLEY, Paul, Kent ,  SEARS, Randall, Kent

IPC: G11C7/00

CPC classification number: H04L12/40013 ,  H04L49/90 ,  H04L49/901

Abstract: A single chip network controller for interfacing (104) between a physical network (106) and a processing system on the media side of the network controller. The network controller includes a physical layer (106) for receiving data for transmission to the network and encoding the received data for transmission thereto and for receiving data from the network, and for receiving data from the network and coding the received data. A media layer is provided for interfacing with the processing system for receiving data from the processing system for interface with the physical layer (106) for encoding and transmission thereof and for receiving decoded data from the physical layer and providing access thereto by the processing system. An on-chip non-volatile memory is provided having a first portion associated with configuration information for configuring the operation of the physical layer (106) and the media layer, and a second portion thereof that is accessible by the processing system on the media side of the network controller (104). A memory interface allows the processing system to interface with the second portion of the memory, such that processing system has an expanded memory capability.

公开(公告)号：EP1198949B1

公开(公告)日：2005-12-21

申请号：EP00960151.9

申请日：2000-07-18

Applicant: Silicon Laboratories, Inc.

Inventor： WEBSTER, Andrew ,  OLAFSSON, Sverrir ,  RAASCH, Charles, F. ,  DOSHI, Nimesh ,  BEADLE, Burk ,  BORDEN, Craig, E. ,  OTTEN, Robert, T.

IPC: H04M11/06 ,  H04L29/06

CPC classification number: H04M11/06 ,  H04L5/1438 ,  H04L29/06 ,  H04L69/24

Abstract: A modem to modem communication system supports call waiting services by exchanging hold request and acknowledge signals before relinquishing the line servicing incoming calls. Thereafter, the modem to modem session is reestablished without having to redial. The hold request may be denied or accepted, and may define the duration a modem will hold before hanging up. The holding modem maintains the session by fooling the higher protocol layers, making them believe that the modem is not on hold. Three-way calling services are also used to free up the shared line for outgoing calls while maintaining the session with holding modems. A table may be employed to screen incoming calls through a comparison of the caller ID information with that in the table. The table may be within the modem or the host computer.