摘要:
The system described comprises various circuit units (10, 11, 12) each having a capacitor (C0, C1, C2) and charging means (G0, G1, G2) for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop (PLL) which uses one (10) of the circuit units as an adjustable oscillator, and current transducer means (17) which regulate the charging currents of the capacitors (C1, C2) of the circuit units (11, 12) in dependence on the regulated charging current of the capacitor (C0) of the oscillator (10) or the error current of the PLL loop.
摘要:
The present invention is aimed at providing a method and a circuit for protecting the output stage of a power actuator against voltage transients of the surge type. In particular, it provides protection against voltage surge transients of the kind described by International Standard IEC 801-5, for a power transistor contained in the output stage of the actuator. The method of this invention provides for:
the utilization of the power transistor (PW) intrinsic diode (DP) for dumping the transient energy to one of the supply generator terminals during a positive transient; and the utilization of the power transistor (PW) restoration feature to the on state for dumping the energy thereinto during a negative transient, while simultaneously inhibiting the current limiting function.
The power transistor (PW) is turned on again, and the current limiting circuit (4) inhibited, by the following steps:
a) generating an electric signal which is substantially proportional to the voltage appearing at the output terminal (OUT) of the actuator; b) driving the control terminal (G) of the power transistor (PW) by means of said electric signal, and causing said transistor to conduct, while simultaneously disabling the current limiting circuit (4) when the output voltage exceeds a predetermined threshold; and c) allowing the transient energy to be dissipated to the power transistor (PW).