公开(公告)号：EP1955333B1

公开(公告)日：2013-04-03

申请号：EP06817678.3

申请日：2006-11-30

申请人： Mosaid Technologies Incorporated

发明人： OH, HakJune

IPC分类号： G11C8/16 ,  G11C8/12 ,  G11C11/4063

CPC分类号： G11C11/406 ,  G11C8/10

公开(公告)号：EP2523358A3

公开(公告)日：2012-11-21

申请号：EP12179705.4

申请日：2001-10-11

申请人： Mosaid Technologies Incorporated

发明人： Binder, Yehuda

IPC分类号： H04N7/10 ,  H04N7/24 ,  H04B3/56 ,  H04L12/66

CPC分类号： H04N7/108 ,  H01R27/02 ,  H01R2201/04 ,  H04B3/56 ,  H04B2203/5445 ,  H04B2203/545 ,  H04L12/66 ,  H04N7/102 ,  H04N7/106

摘要： An outlet (70, 75, 76, 78, 79) for a Local Area Network (LAN), containing an integrated adapter (21, 25) that coverts digital data to and from analog video signal. Such an outlet allows using analog video units in a digital data network (80), eliminating the need for a digital video units or external adapter. The outlet may include a hub (31, 41) that allows connecting both an analog video signal via an adapter, as well as retaining the data network connection, which may be accessed by a network jack (73). The invention may also be applied to a telephone line-based data networking system. In such an environment, the data networking circuitry as well as the analog video adapters are integrated into a telephone outlet, providing for regular telephone service, analog video connectivity, and data networking as well. In such a configuration, the outlet would have a standard telephone jack (71), an analog video jack (72) and at least one data networking jack (73). Outlets according to the invention can be used to retrofit existing LAN and in-building telephone wiring, as well as original equipment in new installation

公开(公告)号：EP2486757A1

公开(公告)日：2012-08-15

申请号：EP10821513.8

申请日：2010-10-05

申请人： MOSAID Technologies Incorporated

发明人： AHMADVAND, Nima ,  HU, Hanwu

IPC分类号： H04W48/16 ,  H04W12/06 ,  H04W4/24 ,  H04W72/04 ,  H04W88/06

CPC分类号： H04W88/10 ,  H04M15/00 ,  H04M17/00 ,  H04M17/02 ,  H04W4/24 ,  H04W12/08 ,  H04W36/0066 ,  H04W48/18 ,  H04W74/004 ,  H04W84/042 ,  H04W84/12 ,  H04W88/06 ,  H04W92/02

摘要： A method and corresponding apparatus for providing a cellular subscriber with access to a WLAN are provided. They involve identifying a multimode mobile terminal, which corresponds to the subscriber and the WLAN from an access request. Based on the identification, the WLAN is authorized to provide the mobile terminal with access. The mobile terminal is then provided with access to the WLAN as a cellular subscriber and enables interoperability between the two networks. For example, the subscriber does not have to supply a credit card to pay for WLAN access directly. Instead, the subscriber pays a cellular network provider, and, in turn, the cellular network provider pays a WLAN provider for the access.

摘要翻译： 提供一种用于提供蜂窝相应订户提供接入到无线网络连接的方法和装置。 它们涉及识别的多模移动终端，其对应于在用户和从请求的无线接入。 基于该识别，则WLAN被授权可以访问所述移动终端提供。 移动终端于是设置有接入WLAN，蜂窝式订户和两个网络之间的互操作性启用。 例如，用户不必提供信用卡直接支付WiFi接入。 取而代之的是，用户支付蜂窝网络供应商，反过来，蜂窝网络提供商支付接入的无线提供商。

公开(公告)号：EP2222071B1

公开(公告)日：2012-05-09

申请号：EP10162261.1

申请日：2001-10-15

申请人： Mosaid Technologies Incorporated

发明人： Binder, Yehuda

IPC分类号： H04M11/06 ,  H01R13/639

CPC分类号： H04M7/0081 ,  H04M1/2535 ,  H04M7/006

公开(公告)号：EP2443629A1

公开(公告)日：2012-04-25

申请号：EP10777275.8

申请日：2010-05-20

申请人： MOSAID Technologies Incorporated

发明人： GILLINGHAM, Peter, B. ,  SCHUETZ, Roland

IPC分类号： G11C7/10 ,  G11C5/02 ,  G11C5/06

CPC分类号： G11C5/025 ,  G06F13/1684 ,  G06F13/4022 ,  G06F13/4243 ,  G11C16/04

摘要： A configurable memory subsystem includes a memory module with a circuit board having a first and a second memory-containing device (MCD) pair mounted thereto. Each MCD pair has a first MCD in communication with a second MCD. Each MCD has an input port, an output port, and a memory each communicating with a bridge. In response to a command, the bridge transfers at least one of a portion of a data packet from the input port to the output port or to the memory, or transfers a portion of a memory packet from the memory to the output port. A loop-back device receives the command and the data packet form the first MCD pair and transmits the command and data packet to the second MCD pair.

公开(公告)号：EP1943651B1

公开(公告)日：2012-04-25

申请号：EP06790843.4

申请日：2006-10-12

申请人： Mosaid Technologies Incorporated

发明人： OH, HakJune

IPC分类号： G11C11/406

CPC分类号： G11C11/406 ,  G11C7/04 ,  G11C11/40615 ,  G11C11/40626

摘要： A dynamic random access memory (DRAM) device having memory cells is operated in a self-refresh mode and a normal mode. A mode detector provides a self- refresh mode signal in the self-refresh mode of operation. It includes a free-running oscillator for generating an oscillation signal independent of the self-refresh mode signal. In response to the oscillation signal, a self-request controller provides a self-refresh request signal in the self-refresh mode. The self-refresh signal is asynchoronized with the self-fresh mode signal and is provided to an address circuit to select a wordline for refreshing the memory cells thereof. The self-refresh request controller includes logic circuitry for arbitrating timing between initial active edges of the oscillation signal and the self-refresh mode signal and providing the self-refresh request and ceasing it, regardless of conflict between the self-refresh mode signal and the oscillation signal upon self-refresh mode entry and exit. The DRAM devices perform and achieve reliable self-refresh for variable DRAM cell retention time.

公开(公告)号：EP2426668A1

公开(公告)日：2012-03-07

申请号：EP11009492.7

申请日：2007-09-12

申请人： MOSAID Technologies Incorporated

发明人： Kim, Jin-Ki

IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/02 ,  G11C7/10 ,  G11C8/08 ,  G11C16/12 ,  G11C16/34

CPC分类号： G11C16/34 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/12 ,  G11C16/344 ,  G11C16/3454 ,  G11C2211/5621

摘要： A threshold voltage distribution scheme for multi-level Flash cells where an erase threshold voltage and at least one programmed threshold voltage lie in an erase voltage domain. Having at least one programmed threshold voltage in the erase voltage domain reduces the Vread voltage level to minimize read disturb effects, while extending the life span of the multi-level Flash cells as the threshold voltage distance between programmed states is maximized. The erase voltage domain can be less than 0V while a program voltage domain is greater than 0V. Accordingly, circuits for program verifying and reading multi-level Flash cells having a programmed threshold voltage in the erase voltage domain and the program voltage domain use negative and positive high voltages.

摘要翻译： 用于多电平闪存单元的阈值电压分配方案，其中擦除阈值电压和至少一个编程的阈值电压位于擦除电压域中。 在擦除电压域中至少有一个编程的阈值电压降低了Vread电压电平，以最小化读取干扰效应，同时在编程状态之间的阈值电压距离最大化的同时延长多电平闪存单元的使用寿命。 编程电压域大于0V时，擦除电压域可以小于0V。 因此，用于程序验证和读取具有擦除电压域中的编程阈值电压和编程电压域的多电平闪存单元的电路使用负和正高电压。

公开(公告)号：EP2273630B1

公开(公告)日：2012-01-18

申请号：EP10178660.6

申请日：2004-06-30

申请人： MOSAID Technologies Incorporated

发明人： Rossi, Giacomo Antonio ,  Rampulla, Alberto

IPC分类号： H01S5/14

CPC分类号： H01S5/141 ,  H01S3/105 ,  H01S3/1062 ,  H01S5/0064 ,  H01S5/02248 ,  H01S5/02284 ,  H01S5/02415 ,  H01S5/02438 ,  H01S5/02476 ,  H01S5/028 ,  H01S5/0654 ,  H01S5/0683 ,  H01S5/1039

公开(公告)号：EP2036090B1

公开(公告)日：2011-11-02

申请号：EP07719712.7

申请日：2007-05-07

申请人： Mosaid Technologies Incorporated

发明人： GILLINGHAM, Peter ,  MCKENZIE, Robert

IPC分类号： G11C7/10 ,  G06F13/16

CPC分类号： G06F13/4243 ,  G11C7/1066 ,  G11C29/50012 ,  G11C2207/2254

摘要： A method of snap-shot data training to determine the optimum timing of the DQS enable signal in a single read operation is provided. This is accomplished by first writing a Gray code count sequence into the memory and then reading it back in a single burst. The controller samples the read burst at a fixed interval from the time the command was issued to determine the loop-around delay. A simple truth table lookup determines the optimum DQS enable timing for normal reads. Advantageously, during normal read operations, the first positive edge of the enabled DQS signal is used to sample a counter that is enabled every time a command is issued. If the counter sample changes, indicating timing drift has occurred, the DQS enable signal can be adjusted to compensate for the drift and maintain a position centered in the DQS preamble. This technique can also be applied to a system that uses the iterative approach to determining DQS enable timing on power up. Another embodiment of the invention is a simple, low latency clock domain crossing circuit based on the DQS latched sample of the counter.

公开(公告)号：EP2306460A3

公开(公告)日：2011-07-27

申请号：EP11000145.0

申请日：2006-09-29

申请人： MOSAID Technologies Incorporated

发明人： Kim, Jin-Ki ,  Pyeon, Hong Beom

IPC分类号： G11C11/4193 ,  G11C11/4197 ,  G11C16/06

CPC分类号： G06F3/0611 ,  G06F3/0655 ,  G06F3/0688 ,  G06F13/4243 ,  G11C5/066 ,  G11C7/1021 ,  G11C7/1051 ,  G11C7/1078 ,  G11C8/10 ,  G11C16/06 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3459 ,  G11C2207/107 ,  G11C2216/30

摘要： An apparatus, system, and method for controlling data transfer between a serial data link interface and memory banks in a semiconductor memory is disclosed. In one example, a flash memory device with multiple serial data links and multiple memory banks, where the links are independent of the banks, is disclosed. The flash memory devices may be cascaded in a daisy-chain configuration using echo signal lines to serially communicate between memory devices. In addition, a virtual multiple link configuration is described wherein a single link is used to emulate multiple links.

摘要翻译： 公开了一种用于控制半导体存储器中的串行数据链路接口与存储体之间的数据传输的装置，系统和方法。 在一个示例中，公开了具有多个串行数据链路和多个存储体的闪存设备，其中链路独立于存储体。 闪存器件可以使用回波信号线以菊花链配置级联以在存储器件之间串行通信。 另外，描述了虚拟多链路配置，其中使用单个链路来模拟多个链路。