Transistor matrix shifter
    61.
    发明公开
    Transistor matrix shifter 失效
    晶体管矩阵变换器

    公开(公告)号:EP0324374A3

    公开(公告)日:1991-05-29

    申请号:EP89100127.3

    申请日:1989-01-05

    IPC分类号: G06F5/00 G06F5/01

    CPC分类号: G06F5/015

    摘要: The present invention provides an expandable ECL matrix shifter which has very few interconnecting wires. The shifter can perform a multicolumn right shift or a multicolumn left shift in one cycle, and it has independent wrap and fill capabilities. Two 2 to 1 multiplexers are provided for each bit position of the input signals. The input signals provide one of the inputs for both of the multiplexers. The second input of each multiplexer is a signal indicating what type of fill is desired. The shifter has horizontal data input lines, vertical data output lines, and diagonal select lines. A bipolar transistor is located at each intersection of a data input line and a data output line. These transistors selectively connect the data input lines to the data output lines in response to signals on the diagonal select lines. Each horizontal data input line is divided into two parts. The division of the data input lines into parts is along a major diagonal of the matrix. The parts of the data input lines on one side of the major diagonal are activated by the output of one of the multiplexers, and the parts of the data input lines on the other side of the major diagonal are activated by the outputs of the second multiplexer.

    Bandwidth compression device
    62.
    发明公开
    Bandwidth compression device 失效
    Bandkompressionsgerät。

    公开(公告)号:EP0404535A2

    公开(公告)日:1990-12-27

    申请号:EP90306716.3

    申请日:1990-06-20

    申请人: SONY CORPORATION

    发明人: Abe, Miki

    IPC分类号: G06F5/00 G06F5/01 H03M7/24

    CPC分类号: G06F5/00 G06F5/01

    摘要: A band compression device for digital signals in which input digital data are subjected to floating to realize bit reduction and in which a high speed compressing operation is made possible by shifting the input digital data by a number of bits equal to about one half the maximum shift quantity before starting the floating operation for the input digital data.

    摘要翻译: 一种用于数字信号的频带压缩装置,其中输入数字数据经历浮动以实现比特缩减,并且其中通过将输入数字数据移位等于最大偏移的大约一半的位数使得可以实现高速压缩操作 开始输入数字数据的浮动操作前的数量。

    Apparatus for determining if there is a loss of data during a shift operation
    63.
    发明公开
    Apparatus for determining if there is a loss of data during a shift operation 失效
    Gerätum festzustellen,obwährendeiner Verschiebungsoperation Daten in Verlust geraten。

    公开(公告)号:EP0377845A2

    公开(公告)日:1990-07-18

    申请号:EP89122989.0

    申请日:1989-12-13

    IPC分类号: G06F5/01 G06F7/48

    CPC分类号: G06F5/015 G06F7/49952

    摘要: Apparatus for shifting and determining if during the shifting of data there has been a loss of precision due to the loss of one or more data bits due to overflow. A small data field is shifted into a much larger data field. The width of the switching mechanism used is based on the number of bits in the small data field. Loss of data is determined in part by ORing the control signals utilized to shift the small data field to the large data field.

    摘要翻译: 用于移位和确定在数据移位期间是否由于溢出导致的一个或多个数据位的丢失而导致精度损失的装置。 一个小数据字段被转移到一个更大的数据字段。 所使用的切换机制的宽度是基于小数据字段中的位数。 通过将用于将小数据字段移位到大数据字段的控制信号进行OR运算来部分地确定数据丢失。

    Apparatus and method for performing a shift operation in a multiplier array circuit
    64.
    发明公开
    Apparatus and method for performing a shift operation in a multiplier array circuit 失效
    用于在多路阵列电路中执行移位操作的装置和方法

    公开(公告)号:EP0291356A3

    公开(公告)日:1990-01-10

    申请号:EP88304420.8

    申请日:1988-05-16

    摘要: In floating point opertaions, it is necessary to align the fractions of the exponents before addition or subtraction operations can be executed. This fraction alignment is performed by a shifting operation, typically using dedicated apparatus such as a barrel shifter. While the dedicated apparatus provides high performance in the execution of the shifting operation, this performance is accomplished by reserving a portion of the substrate area to apparatus implementation. To avoid the use of dedicated apparatus, the shifting operation is performed in a multiplier unit, according to the present invention, by entering the number to be shifted in the multiplicand register of the multiplier unit while entering appropriate control signals in the multiplier register. In this manner, a shifting operation can be performed without dedicated apparatus and with minor impact on performance.

    Display architecture having variable data width
    65.
    发明公开
    Display architecture having variable data width 失效
    Anzeigeaufbau mitveränderlicherDatenbreite。

    公开(公告)号:EP0163209A2

    公开(公告)日:1985-12-04

    申请号:EP85106035.0

    申请日:1985-05-17

    IPC分类号: G06F5/01 G06F12/04

    CPC分类号: G09G5/391 G06F5/01 G09G5/39

    摘要: The display architecture supports a variable, selectable number of bits per chip and a variable, selectable segment width. The architecture comprises a plurality of dynamic memory chips and a function generator. Each of the memory chips includes at least two data islands wherein each data island has its own data in/out line, chip select and increment bit supplied by the function generator. The function generator receives a starting address X o , Y o , the data path width No and an encoded segment width S. bit incrementer in the function generator generates A increment bits A l based on the externally supplied modulo No. The function generator generates the physical word address W o and physical bit address b o based on the starting address X o , Y o , the data path width No and the encoded segment width S. Logic circuitry is responsive to an overflow bit produced by the bit incrementer to control spill and wrap function.

    摘要翻译: 显示器架构支持每个芯片可变的可选择的位数和可变的可选择的段宽度。 该架构包括多个动态存储器芯片和功能发生器。 每个存储器芯片包括至少两个数据岛,其中每个数据岛具有其自己的数据输入/输出线,由功能发生器提供的片选和递增位。 函数发生器接收起始地址XO,YO,数据路径宽度ND和编码段宽度S.函数发生器中的比特递增器基于外部提供的模ND产生A增量位AI。 函数发生器基于起始地址XO,Y0,数据路径宽度ND和编码段宽度S生成物理字地址WO和物理位地址b0。逻辑电路响应于位加法器产生的溢出位以控制 溢出和包装功能。

    FUNCTION APPROXIMATION DEVICE AND METHOD USING MULTI-LEVEL LOOK-UP TABLE

    公开(公告)号:EP4375855A1

    公开(公告)日:2024-05-29

    申请号:EP22846116.6

    申请日:2022-07-12

    申请人: SAPEON Korea Inc.

    发明人: HAN, Jeong Ho

    IPC分类号: G06F17/17 G06F5/01

    CPC分类号: G06F5/01 G06F17/17

    摘要: A method and an apparatus are disclosed for a function approximation using a multi-level lookup table. The function approximation device and the method approximate function values for a function in multiple stages using a multi-level lookup table (LUT) in approximating nonlinear function values based on piecewise linear approximation or piecewise polynomial approximation. In the multi-level LUT, a segment length is set differently depending on the amount of change in the function in order to reduce approximation errors.

    VARIABLE WIDTH BARREL SHIFTER
    68.
    发明公开

    公开(公告)号:EP4266168A1

    公开(公告)日:2023-10-25

    申请号:EP23162451.1

    申请日:2023-03-16

    摘要: A variable width barrel shifter. The variable width barrel shifter includes a first barrel shifter configured to receive a data vector of width M as input. The variable width barrel shifter further includes a second barrel shifter configured to receive the data vector of width M as input. The variable width barrel shifter includes an element-wise multiplexer coupled to the first and second barrel shifters. The element-wise multiplexer is configured to provide a shifted output of the data vector of width M by including a first portion of output from the second barrel shifter and a second portion of output from the first barrel shifter.