摘要:
There is provided a fail control apparatus for an automatic transmission, which, in the event of a friction element failure, is capable of coping with the failure by identifying a failed part without erroneous determination and within a short time. The set gear ratio of a designated gear position at the time of failure and the actual gear ratio are compared with each other to determine whether a friction element has failed, and an alternative gear position which enables a vehicle to start moving again is designated based on the determination result. In determining a failed friction element, one friction element disengaged or engaged due to failure is identified only when the designated gear position is the first speed gear position which is achieved by engaging one low clutch and a one-way clutch. It is therefore possible to determine the details of failure with accuracy and properly set an alternative gear position. On the other hand, when the designated gear position at the time of failure is other than the first speed gear position, in which a plurality of friction elements are engaged, one friction element which has failed is not identified, and it is therefore possible to quickly set an alternative gear position without the possibility of erroneous determination.
摘要:
A banknote conveyor which includes moveable means (16,14,18) for transporting a banknote (12), the means engaging frictionally with the banknote at at least three points so that the force driving the banknote is dependent on the rigidity of the note. The banknote (12) can further swivel about one of the points (16,14,18) to align the note with a desired path. Also provided is a means (140) for limiting the movement of the banknote if the force required to convey the banknote exceeds a predetermined limit and means (130) for preventing the insertion of banknotes or other foreign objects into the conveyor when not in use.
摘要:
Apparatus for use in a processing system having a host processor (CPU) capable of executing a first instruction set to assist in running instructions of a different instruction set which is translated to the first instruction set by the host processor (CPU) including circuitry (Gated Store Buffer) for temporarily storing memory stores generated until a determination that a sequence of translated instructions will execute without exception or error on the host processor (CPU), circuitry for permanently storing memory stores temporarily stored when a determination is made that a sequence of translated instructions will execute without exception or error on the host processor (CPU), and circuitry for eliminating memory stores temporarily stored when a determination is made that a sequence of translated instructions will generate an exception or error on the host processor (CPU).