VERFAHREN ZUR LEISTUNGSOPTIMALEN ANSTEUERUNG VON BLDC-MOTOREN

    公开(公告)号:EP1597816A1

    公开(公告)日:2005-11-23

    申请号:EP04713844.1

    申请日:2004-02-24

    申请人: Melexis GmbH

    IPC分类号: H02P6/14

    CPC分类号: H02P6/182 H02P6/15 Y02P80/116

    摘要: The invention relates to a method for effecting improved power control of brushless direct current motors: BLDC motors). The time difference between two successive zero crossings (TN1, TN2), reversal of direction of the induced voltage of a motor coil, through which voltage is not flowing, of two motor phases is measured. This time difference serves as a measure for the directly following commutation instant of the temporally following motor phase according to a simple algorithm. An influencing ensues in this manner before each switching into the subsequent state. The points in time of the respective zero crossings (TN1, TN2) are load-dependent, and a switching based on an algorithm matched thereto is thus able to immediately react even to erratic changes in load.

    摘要翻译: 该方法包括通过测量非通电电动机线圈中的感应电压的两个紧随连续的零交叉点(TN1,TN2)之间的时间差并在确定时间差的一半之后换向下一个电动机相位来连续更新换向时间点 过去。 这是继续的,使用所有阶段的切换算法。 还包括以下独立权利要求:(a)用于电力最优控制无刷直流电动机的电路装置(b)启动BDLC电动机(c)的方法和一种容错功率最优操作方法 BDLC电机。

    EIGENSCHAFTSNACHWEIS (FORMALE VERIFIKATION) FÜR EIN MISCHSYSTEM MIT ANALOGEN UND DIGITALEN TEILSYSTEMEN
    4.
    发明公开
    EIGENSCHAFTSNACHWEIS (FORMALE VERIFIKATION) FÜR EIN MISCHSYSTEM MIT ANALOGEN UND DIGITALEN TEILSYSTEMEN 审中-公开
    特征检测(形式化验证)可用于模拟和数字子系统,一个混合系统

    公开(公告)号:EP1590751A2

    公开(公告)日:2005-11-02

    申请号:EP04708308.4

    申请日:2004-02-05

    申请人: Melexis GmbH

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5009 G06F2217/86

    摘要: The invention relates to a method for detecting properties of a digital-analog mixed signal system (1) by formally verifying a digital substitution system (20). Component parameters and environment parameters are depicted as additional signals in the digital substitution model (substitution model, 20) for the analog components, and the analog part of the system is divided (90) into time-independent and linear time-dependent subsystems. The time-independent subsystems are regarded as stateless and are converted by combinatorial logic and the linear time-dependent subsystems for time-discretization while being substituted by finite automations. Despite the digitizing errors, it is possible to reliably draw conclusions about the original system from the verification results of the substitution model. The properties of the digital-analog mixed signal system (1) that are to be detected are enhanced for the analog components in such a manner that, in all occurring values of digitizing errors, these properties in the digital substitution model are only fulfilled once the digital-analog mixed signal system (1) also fulfills these properties by limiting (92) the permitted range of values for analog signals is limited (92) to twice the amount of the maximum digitizing error.

    VERFAHREN UND ANORDNUNG ZUR STÖRUNTERDRÜCKUNG IN EINER EMPFÄNGERSCHALTUNG
    8.
    发明公开
    VERFAHREN UND ANORDNUNG ZUR STÖRUNTERDRÜCKUNG IN EINER EMPFÄNGERSCHALTUNG 有权
    方法和系统抑制的接收器电路

    公开(公告)号:EP1238468A1

    公开(公告)日:2002-09-11

    申请号:EP01960618.5

    申请日:2001-08-03

    IPC分类号: H04B1/24 H04B10/06

    CPC分类号: H04B1/24 H04B10/6972

    摘要: The invention relates to a method for noise rejection by means of a performance-adjustable bandpass filter in a receiver circuit, for carrier-modulated received signals Sin, whereby the bandpass-filtered received signal Bout is demodulated and the demodulated received signal Dout is used to start a switching process. Conventional receiver circuits, however, have the disadvantage that, due to the small dimensions of the circuit surface area, disturbances, for example, in the form of oscillator variations due to capacitive coupling, are caused as a result of switching processes in the output region of the receiver, in particular, due to power transistors. Said disturbances cannot be eliminated by an amplifier control provided in the circuit. According to the invention, said internal disturbances may be removed whereby a power reduction in the bandpass filter is correlated with the switching process which causes the disturbance. The above circuit is suitable above all for the construction of circuits for infra-red receivers, which can thus be produced small, without external components and hence economically.

    IMPROVEMENTS IN OR RELATING TO DRIVING BRUSHLESS DC (BLDC) MOTORS
    9.
    发明公开
    IMPROVEMENTS IN OR RELATING TO DRIVING BRUSHLESS DC (BLDC) MOTORS 有权
    的改进与该无刷管制(BLDC)发动机

    公开(公告)号:EP1943723A2

    公开(公告)日:2008-07-16

    申请号:EP06795416.4

    申请日:2006-09-04

    申请人: Melexis GmbH

    发明人: PAINTZ, Christian

    IPC分类号: H02P6/18

    CPC分类号: H02P6/182 H02P2209/07

    摘要: The driving system for a tri-polar electric motor (100) comprises three phase windings (101u-1O1w). The winding drivers (102u-102w) drive each winding 101u-101w with a driving waveform (200) of the type shown in figure 2. The driving waveform (200) has a non-zero driving phase and intervals wherein the input is equal to zero at the start, middle and end of each driving phase. Using a driving waveform (200) of this type enables monitoring of the back EMF in the winding during each interval when the input is equal to zero. This enables regular monitoring of the zero crossing point of each winding (101u-101w) and hence of the position of the rotor. This enables the motor to operate efficiently without generating a torque ripple.

    Treiberschaltung für PC-Bus
    10.
    发明公开
    Treiberschaltung für PC-Bus 审中-公开
    TreiberschaltungfürPC-Bus

    公开(公告)号:EP1193873A3

    公开(公告)日:2002-04-17

    申请号:EP01123035.6

    申请日:2001-09-26

    申请人: Melexis GmbH

    摘要: Schaltungsanordnung eines dem USB-Standard entsprechenden in CMOS-NWELL-Technologie herstellbaren Low-Speed-Treibers für einen PC-Bos. Ein Schaltungsteil ermittelt die Flankensteilheit der Datenleitung mit der fallenden Flanke und regelt diese. Eine weitere Teilschaltung versetzt die Regelung beschleunigt in den Arbeitszustand. Aus dem Ergebnis der Regelung der Datenleitung mit fallender Flanke wird die Information zur Steuerung der Datenleitung mit steigender Flanke gewonnen. Die durch die Außenbeschaltung erzeugte Unsymmetrie des USB wir durch angepaßte Übertragung der Regelströme ausgeglichen.

    摘要翻译: 该电路包括用于下降沿的边沿调节,用于上升沿的边沿控制和逻辑电路以及USB收发器所需的其他电路级。 这些元件连接在一起,并采用CMOS-NWELL技术单片集成。