摘要:
A low noise amplifier (500) includes a first transconductance device (326) having a control electrode for receiving a first input signal, and a first current electrode; a first load device (322) having a first terminal coupled to a first power supply voltage terminal and a second terminal coupled to the first current electrode of the first transconductance device (326) and forming a first output voltage signal; a second transconductance device (336) having a control electrode for receiving a second input signal, and a second current electrode; a second load device (332) having a first terminal coupled to the first power supply voltage terminal and a second terminal coupled to the first current electrode of the second transconductance device (336) and forming a second output voltage signal; and an attenuation device (340) coupled between the first current electrodes of the first (326) and second (336) transconductance devices and having a control input terminal for receiving a control voltage thereon.
摘要:
A low noise amplifier (500) includes a first transconductance device (326) having a control electrode for receiving a first input signal, and a first current electrode; a first load device (322) having a first terminal coupled to a first power supply voltage terminal and a second terminal coupled to the first current electrode of the first transconductance device (326) and forming a first output voltage signal; a second transconductance device (336) having a control electrode for receiving a second input signal, and a second current electrode; a second load device (332) having a first terminal coupled to the first power supply voltage terminal and a second terminal coupled to the first current electrode of the second transconductance device (336) and forming a second output voltage signal; and an attenuation device (340) coupled between the first current electrodes of the first (326) and second (336) transconductance devices and having a control input terminal for receiving a control voltage thereon.
摘要:
A circuit for coupling a signal source (Vi) producing a signal having a given voltage waveform to a load (6) having two ends, the circuit being composed of: a load voltage control unit (A1) connectable between the signal source and one end of the load for producing across the load (6) a voltage corresponding to the signal voltage; and a load current control unit (A2) connectable to the load (6) and operable independently of the signal source (Vi) for producing a current flow through the load (6) sufficient to cause the voltage across the load (6) or the current through the load (5) to have the given waveform.
摘要:
A high gain differential amplifier including a differential transistor pair (M₁, M₂) having first and second transistors (M₁, M₂) whose gates are connected to first and second input terminals (t₁, t₂); a current mirror circuit wherein the drain of the transistor (M₁) is connected to an output terminal; a transistor (M₅) whose gate and drain are connected to the drain of transistor (M₁) and output terminal of the current mirror circuit, and to the output terminal (t₃) and the drain of transistor (M₂), respectively; a transistor (M₆) whose drain and gate are connected to an input terminal of the current mirror circuit, and to a bias power supply terminal, respectively; and constant-current source (I₁, I₂) which are connected to the common sources of differential transistor pair (M₁, M₂) and a source of the transistor (M₆), respectively. The addition of the sixth transistor (M₆) permits a voltage between the drain and source of the third and fourth transistors (M₃, M₄) to be nearly equal. As a result, a drain current ratio between the third and fourth transistors (M₃, M₄) can be precisely determined and thus an input offset voltage can be reduced to nearly zero.
摘要:
Amplificateur comportant une première et une deuxième paires différentielles de transistors d'entrée (T₁, T₂), (T₃, T₄), les bases des transistors homologues de chaque paire étant connectées entre elles et au moins une partie du courant collecteur des transistors de la deuxième paire (T₃, T₄) est utilisée en sommation (algébrique) avec le courant collecteur des transistors de la première paire (T₁, T₂) pour augmenter la linéarité du signal de sortie (V₅ - V₆) de l'amplificateur. L'amplificateur comporte en outre une paire de transistors cascode (T₅, T₆), connectés en tant que charge collecteur des transistors de la première paire de transistors (T₁, T₂) tandis que la sommation précitée est réalisée au moyen de ponts résistifs (R₃, R₅), (R₄, R₆) connectés à partir d'une tension d'alimentation V'cc vers chacun des collecteurs des transistors de la première paire (T₁, T₂) tandis que le point intermédiaire (U, V) de ces ponts résistifs est connecté respectivement au collecteur des transistors de la deuxième paire (T₃, T₄). Amplificateurs à plage de linéarité étendue du signal de sortie.
摘要:
An apparatus includes a differential cascode amplifier including a first transistor and a second transistor. The apparatus further includes a transistor including a source terminal coupled to a gate terminal of the first transistor of the differential cascode amplifier. The transistor also includes a drain terminal coupled to a gate terminal of the second transistor of the differential amplifier.
摘要:
An amplifier including a first cascode circuit including a first transistor and a second transistor whose source or emitter is coupled to a drain or a collector of the first transistor, a second cascode circuit being a differential pair with the first cascode circuit, the second cascode circuit including a third transistor whose source or emitter is coupled to a source or an emitter of the first transistor and a fourth transistor whose source or emitter is coupled to a drain or collector of the third transistor, a first feedback path that couples between an output terminal of the third transistor and an input terminal of the first transistor, the first feedback path including a first capacitative element, and a second feedback path that couples between an output terminal of the first transistor and an input terminal of the third transistor, the second feedback path including a second capacitative element.