Wide bandgap field effect transistors with source connected field plates
    1.
    发明公开
    Wide bandgap field effect transistors with source connected field plates 审中-公开
    场效应晶体管具有大的带隙和源极连接的场板

    公开(公告)号:EP2515338A3

    公开(公告)日:2012-12-12

    申请号:EP12171401.8

    申请日:2005-04-21

    申请人: Cree, Inc.

    摘要: A transistor, comprises an active region, source electrode (18), drain electrode (20), and gate all in electrical contact with the active region. The gate (22) is between the source and drain electrodes. A spacer layer (26) is on at least a portion of a surface of the active region between the gate and drain electrode. A field plate (30) is on the spacer layer and electrically isolated from the gate and active region and electrically connected by at least one conductive path (34 )to the source electrode. Each of the at least one conductive path runs outside of the active region and not over the active region between the gate and source electrode. The field plate reduces the peak operating electric field in the transistor.

    Wide bandgap field effect transistors with source connected field plates
    2.
    发明公开
    Wide bandgap field effect transistors with source connected field plates 审中-公开
    具有源极连接场板的宽带隙场效应晶体管

    公开(公告)号:EP2515338A2

    公开(公告)日:2012-10-24

    申请号:EP12171401.8

    申请日:2005-04-21

    申请人: Cree, Inc.

    IPC分类号: H01L29/812 H01L29/41

    摘要: A transistor, comprises an active region, source electrode (18), drain electrode (20), and gate all in electrical contact with the active region. The gate (22) is between the source and drain electrodes. A spacer layer (26) is on at least a portion of a surface of the active region between the gate and drain electrode. A field plate (30) is on the spacer layer and electrically isolated from the gate and active region and electrically connected by at least one conductive path (34 )to the source electrode. Each of the at least one conductive path runs outside of the active region and not over the active region between the gate and source electrode. The field plate reduces the peak operating electric field in the transistor.

    摘要翻译: 晶体管包括与有源区电接触的有源区,源电极(18),漏电极(20)和栅极。 栅极(22)位于源电极和漏电极之间。 间隔层(26)位于栅电极和漏电极之间的有源区的表面的至少一部分上。 场板(30)位于间隔层上并且与栅极和有源区电隔离,并且通过至少一个导电路径(34)电连接到源电极。 至少一个导电路径中的每一个导电路径在有源区之外延伸,而不在栅极和源极之间的有源区之上。 场板减少晶体管中的峰值工作电场。

    Wide bandgap field effect transistors with source connected field plates
    3.
    发明公开
    Wide bandgap field effect transistors with source connected field plates 审中-公开
    具有源极连接场板的宽带隙场效应晶体管

    公开(公告)号:EP2515339A3

    公开(公告)日:2012-12-12

    申请号:EP12171403.4

    申请日:2005-04-21

    申请人: Cree, Inc.

    摘要: A transistor, comprises an active region; a source electrode (18) in electrical contact with the active region; a drain electrode (20) in electrical contact with the active region; and a gate (22) in electrical contact with the active region between the source and drain electrodes. A spacer layer (26) is provided over at least a portion of the region between the gate and the drain electrode and between the gate and the source electrode. A field plate (30) on the spacer layer is electrically isolated from the active region and gate by the spacer layer formed at least partially over the gate. The field plate is electrically connected to the source electrode by at least one conductive path (32), each of which at least one conductive path is formed on the spacer layer and covers less than all the topmost surface of the spacer layer between the gate and source electrode.

    摘要翻译: 晶体管,包括有源区; 源电极(18),其与有源区电接触; 与有源区电接触的漏电极(20) 和与源电极和漏电极之间的有源区电接触的栅极(22)。 在栅极和漏极之间以及栅极和源极之间的区域的至少一部分上设置有间隔层(26)。 隔离层上的场板(30)通过至少部分地形成在栅极上方的隔离层与有源区和栅极电隔离。 场板通过至少一个导电路径(32)电连接到源电极,每个导电路径在间隔层上形成至少一个导电路径,并覆盖栅极和栅极之间的间隔层的全部最顶表面 源电极。

    Transistors with fluorine treatment
    4.
    发明公开
    Transistors with fluorine treatment 审中-公开
    具有氟处理的晶体管

    公开(公告)号:EP2312634A2

    公开(公告)日:2011-04-20

    申请号:EP11153385.7

    申请日:2006-07-07

    申请人: Cree, Inc.

    摘要: A high electron mobility transistor (HEMT), comprises a buffer layer; a barrier layer on said buffer layer; a two dimensional electron gas (2DEG) at the interface between said buffer layer and said barrier layer; and a negative ion region in said barrier layer.

    摘要翻译: 高电子迁移率晶体管(HEMT)包括缓冲层; 在所述缓冲层上的阻挡层; 在所述缓冲层和所述阻挡层之间的界面处的二维电子气(2DEG) 和在所述阻挡层中的负离子区域。

    Wide bandgap HEMTs with source connected field plates
    5.
    发明公开
    Wide bandgap HEMTs with source connected field plates 审中-公开
    Hemts mit grossem Bandabstand mit source-verbundenen Feldplatten

    公开(公告)号:EP2270871A1

    公开(公告)日:2011-01-05

    申请号:EP10183607.0

    申请日:2005-03-24

    申请人: Cree, Inc.

    IPC分类号: H01L29/778 H01L29/06

    摘要: A transistor comprises a plurality of active semiconductor layers (16,18) and source and drain electrodes (20, 22) on the semiconductor layers. A gate (24) is formed between the source and drain electrodes and on the semiconductor layers. A spacer layer (26) covers at least part of the surface of the semiconductor layers between the gate and the drain, or covers at least part of the surface of the semiconductor layers between the gate and the source. A field plate (30) is formed on the spacer layer; and a conductive path (34,46) runs outside the area covered by the semiconductor layers, and between the field plate and the source electrode to electrically connect the field plate to the source electrode.

    摘要翻译: 晶体管包括在半导体层上的多个有源半导体层(16,18)和源极和漏极(20,22)。 在源极和漏极之间以及半导体层上形成栅极(24)。 间隔层(26)覆盖栅极和漏极之间的半导体层的至少一部分表面,或者覆盖栅极和源极之间的半导体层的表面的至少一部分。 在间隔层上形成场板(30) 并且导电路径(34,46)延伸到由半导体层覆盖的区域的外部,并且在场板和源极之间,以将场板电连接到源电极。

    Wide bandgap transistors with multiple field plates
    6.
    发明公开
    Wide bandgap transistors with multiple field plates 审中-公开
    具有多个场板大的带隙的晶体管

    公开(公告)号:EP2538446A3

    公开(公告)日:2014-01-15

    申请号:EP12180744.0

    申请日:2005-04-14

    申请人: Cree, Inc.

    摘要: A transistor (10) comprises an active region (18) having a channel and source (20) and drain (22) electrodes in contact with the active region. A gate (24, 124,142) is between the source and drain electrodes and on the active region. A plurality of field plates (30,42) is arranged on the active region, each extending toward the drain electrode, and each of which is isolated from the active region and from the others of the field plates. The topmost (42) of the field plates electrically is connected to the source electrode.

    Transistors with fluorine treatment
    8.
    发明公开
    Transistors with fluorine treatment 审中-公开
    具有氟处理的晶体管

    公开(公告)号:EP2312635A2

    公开(公告)日:2011-04-20

    申请号:EP11153386.5

    申请日:2006-07-07

    申请人: Cree, Inc.

    摘要: A semiconductor based device, comprises a plurality of active semiconductor layers experiencing an operating electric (E) field; and a negative ion region within at least one of said plurality of semiconductor layers to counter said operating (E) field.

    摘要翻译: 一种基于半导体的器件,包括多个经历工作电场(E)的有源半导体层; 以及在所述多个半导体层中的至少一个内的负离子区域以对抗所述操作(E)场。

    Wide bandgap HEMTs with source connected field plates
    9.
    发明公开
    Wide bandgap HEMTs with source connected field plates 审中-公开
    HEMTS mit grossem Bandabstand mit Source-verbundenen Feldplatten

    公开(公告)号:EP2270870A1

    公开(公告)日:2011-01-05

    申请号:EP10183441.4

    申请日:2005-03-24

    申请人: Cree, Inc.

    IPC分类号: H01L29/778 H01L29/06

    摘要: A transistor (10) comprises a plurality of active semiconductor layers (16,18). Source (20) and drain (22) electrodes are formed on the active semiconductor layers. A gate (24) is formed between the source and drain electrodes and on the active semiconductor layers. A spacer layer (26) covers the surface of the active semiconductor layers between the gate and the source, and at least a portion of the active semiconductor layers between the gate and drain electrode. A field plate (30) is formed on the spacer layer isolated from the active semiconductor layers and extending a distance (L f ) from the gate toward the drain electrode, the field plate electrically connected to the source electrode by a conductive structure (32,34,44,46).

    摘要翻译: 晶体管(10)包括多个有源半导体层(16,18)。 源极(20)和漏极(22)电极形成在有源半导体层上。 在源极和漏极之间以及有源半导体层上形成栅极(24)。 间隔层(26)覆盖栅极和源极之间的有源半导体层的表面,以及栅极和漏极之间的有源半导体层的至少一部分。 在与有源半导体层隔离的间隔层上形成场板(30),并且从栅极向漏电极延伸距离(L f),通过导电结构(32,32)与源电极电连接的场板, 34,44,46)。