公开(公告)号：EP0878443A4

公开(公告)日：2006-09-27

申请号：EP97901265

申请日：1997-01-27

申请人： FUJIKIN KK ,  OHMI TADAHIRO

发明人： OHMI TADAHIRO ,  KAWADA KOJI ,  TANABE YOSHIKAZU ,  NITTA TAKAHISA ,  IKEDA NOBUKAZU ,  MORIMOTO AKIHIRO ,  HIRAO KEIJI ,  MOROKOSHI HIROSHI ,  MINAMI YUKIO

IPC分类号： C01B5/00 ,  B01J4/04 ,  B01J8/02 ,  B01J8/06 ,  B01J12/00 ,  B01J19/24

CPC分类号： C01B5/00

摘要： The invention further reduces a size and cost of a reactor for generating water from oxygen and hydrogen, provides high-purity water in an amount necessary for practical use safely, stably and continuously, and allows a platinum-coated catalyst layer formed on an inner wall of a reactor body to maintain high catalytic activity over a long period of time. Specifically, the reactor comprises a body made of a heat-resistant material and having an inlet and an outlet for water/moisture gas, has a gas-diffusing member provided in an internal space of the body, and has a platinum coating on an internal wall surface of the body. Hydrogen and oxygen fed from the inlet is diffused by the gas-diffusing member and then comes into contact with the platinum coating to enhance reactivity, thereby producing water from hydrogen and oxygen. A temperature of the reactor for generating moisture, wherein hydrogen is reacted with oxygen at a high temperature to generate moisture, is held to be below an ignition temperature of hydrogen or a hydrogen-containing gas so that hydrogen is reacted with oxygen while preventing explosive combustion of hydrogen and oxygen. The platinum-coated catalyst layer on the internal wall of the reactor body is formed by treating the surface of the internal wall of the body, cleaning the treated surface, forming a barrier coating of a nonmetallic material of an oxide or nitride on the wall surface, and forming the platinum coating on the barrier coating.

摘要翻译： 本发明进一步减小了尺寸和用于产生由氧气和氢气水的反应器的成本，提供了高纯度的水到所需量实际使用安全，稳定地和连续地，并允许形成在到内壁上的镀铂催化剂层 反应器主体的在一段长时间内保持高的催化活性。 具体地，该反应器包括一个由耐热材料制成，并在入口和出口，用于水/水分气体具有主体，具有气体扩散构件在所述主体的内部空间中设置于，并且具有铂在内部涂覆上 主体的壁面上。 氢气和氧气从所述入口供给由气体扩散构件扩散，然后与铂涂层接触，以提高反应性，从而由氢气和氧气产生水。 该反应器用于产生湿气，worin氢的温度在高温下与氧反应生成的水分，被保持为低于氢或含氢气体，从而也氢进行反应与氧气的燃点温度，同时防止爆炸燃烧 的氢气和氧气。 在反应器主体的内壁涂覆铂的催化剂层通过处理所述体的内壁的表面上，清洗处理过的表面，在壁表面上形成的氧化物或氮化物的非金属材料构成的阻挡涂布形成 ，以及形成在该阻挡涂层的铂涂层。

公开(公告)号：EP1039372A4

公开(公告)日：2005-02-02

申请号：EP98961396

申请日：1998-12-17

申请人： ULTRACLEAN TECHNOLOGY RES INST ,  OHMI TADAHIRO ,  I & F INC

发明人： OHMI TADAHIRO ,  IMAI MAKOTO ,  NOZAWA TOSHIYUKI ,  FUJIBAYASHI MASANORI ,  KOTANI KOJI ,  SHIBATA TADASHI ,  NITTA TAKAHISA

IPC分类号： G06F7/00 ,  G06F7/48 ,  G06F7/50 ,  G06F7/506

CPC分类号： G06F7/4824 ,  G06F7/506

摘要： A semiconductor circuit for arithmetic operation, which uses a reduced circuit area and provides high-speed processing by restricting nonessentials. The semiconductor circuit comprises an arithmetic circuit (adders 1-3) and delay means (memory 4). The arithmetic circuit includes arithmetic units for operation on input data, and they operate on digits of input data in a period of operation time, and produce results of operation, together with data corresponding to a carry, if any. The output from the arithmetic circuit is delayed by one period of operation time through the delay means.

摘要翻译： 提供了一种用于算术处理的半导体电路和运算处理方法，其可以通过抑制浪费处理来提高处理数据的速率并减小电路的面积。 提供了一种用于计算输入数据的计算单元，该计算单元在计算时间单位内计算输入数字数据，并输出表示通过计算获得的结果的计算结果，并且如果在计算中产生进位，则计算电路（ 用于输出表示该进位的进位数据的加法器1-3）和用于将来自计算电路的计算结果延迟一个计算时间单位的延迟装置（存储器4）。

公开(公告)号：EP1065709A4

公开(公告)日：2007-10-31

申请号：EP99949372

申请日：1999-10-22

申请人： ULTRACLEAN TECHNOLOGY RES INST ,  OHMI TADAHIRO

发明人： OHMI TADAHIRO ,  HIRAYAMA MASAKI ,  NITTA TAKAHISA

IPC分类号： H01L21/302 ,  H01L21/00 ,  H01L21/205 ,  H01L21/3065

CPC分类号： H01L21/67213 ,  H01L21/67167 ,  H01L21/6719

摘要： A semiconductor manufacturing apparatus which can process the surface of a wafer uniformly and requires a small installation floor area and has an excellent maintainability. The apparatus comprises a vacuum enclosure including at least one wafer mounting stage on its bottom plate, and a cylinder surrounding the wafer mounting stage, and at least one cylinder lifting mechanism disposed for each cylinder for moving the cylinder vertically to vary the clearance between the cylinder and the top plate or bottom plate of the vacuum enclosure and for separating the space outside the cylinder constituting a transfer chamber for transferring the wafer from the space inside the cylinder constituting a process chamber for processing the surface of the wafer, wherein the transfer chamber includes a wafer transfer mechanism for transferring the wafer between the process chamber and the transfer chamber through the clearance, the process chamber has a process chamber gas feed port and a process chamber gas exhaust port, and said transfer chamber has a transfer chamber gas feed port and a transfer chamber gas exhaust port.

公开(公告)号：EP1079394A4

公开(公告)日：2001-07-11

申请号：EP99913705

申请日：1999-04-19

申请人： ULTRACLEAN TECHNOLOGY RES INST ,  OHMI TADAHIRO ,  SHIBATA TADASHI

发明人： OHMI TADAHIRO ,  SHIBATA TADASHI ,  WEE KENG HOONG ,  YONEZAWA TAKEMI ,  NOZAWA TOSHIYUKI ,  NITTA TAKAHISA

IPC分类号： G11C16/02 ,  G11C11/56 ,  G11C27/00 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： G11C11/5642 ,  G11C11/5621 ,  G11C11/5628 ,  G11C27/005 ,  G11C2211/5613

摘要： A semiconductor circuit of large-scale integration for storing analog data and multivalued data accurately at high speed. The semiconductor circuit comprises memory cells for analog and multivalued signals, a read circuit provided with an output to produce voltage indicating a value stored in the memory cell, a comparator provided with an output to produce an end-of-write signal when the voltage at the output of the read circuit becomes equal to a predetermined voltage, a write voltage control circuit having an input for receiving analog and multivalued voltage as write voltage of the memory cell and having an output for producing voltage corresponding to the voltage value, and a write voltage switch circuit for supplying the output voltage from the write voltage control circuit to the memory cell until the end-of-write signal appears at the output of the comparator.