公开(公告)号：EP0198320B1

公开(公告)日：1991-05-29

申请号：EP86104458.4

申请日：1986-04-02

申请人： HITACHI, LTD.

发明人： Hosokawa, Yoshikazu ,  Suzuki, Takaya ,  Mimura, Akio ,  Aoyama, Takashi ,  Konishi, Nobutake ,  Miyata, Kenji

IPC分类号： H01L29/784 ,  H01L29/04

CPC分类号： H01L29/78675

公开(公告)号：EP0198320A2

公开(公告)日：1986-10-22

申请号：EP86104458.4

申请日：1986-04-02

申请人： HITACHI, LTD.

发明人： Hosokawa, Yoshikazu ,  Suzuki, Takaya ,  Mimura, Akio ,  Aoyama, Takashi ,  Konishi, Nobutake ,  Miyata, Kenji

IPC分类号： H01L29/784 ,  H01L29/04

CPC分类号： H01L29/78675

摘要： A thin film field effect transistor using a thin polycrystalline silicon film formed on an insulating substrate (11) is disclosed in which the thin polycrystalline silicon film is made up of a high-resistance polycrystalline silicon layer (12) disposed on the insulating substrate and a low-resistance polycrystalline silicon layer (13) formed on the high-resistance polycrystalline silicon layer (12) and source and drain electrodes (17a, 17b) are kept in ohmic contact with the low-resistance polycrystalline silicon layer (13).

摘要翻译： 公开了一种使用形成在绝缘基板（11）上的薄多晶硅膜的薄膜场效应晶体管，其中薄多晶硅膜由设置在绝缘基板上的高电阻多晶硅层（12）和 形成在高电阻多晶硅层（12）和源极和漏极（17a，17b）上的低电阻多晶硅层（13）与低电阻多晶硅层（13）欧姆接触。

公开(公告)号：EP0042175A3

公开(公告)日：1982-06-02

申请号：EP81104653

申请日：1981-06-16

申请人： Hitachi, Ltd.

发明人： Kobayashi, Yutaka ,  Suzuki, Takaya

IPC分类号： H01L21/268 ,  H01L29/78 ,  H01L27/12

CPC分类号： H01L27/12 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/0245 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/268 ,  H01L29/78657 ,  Y10S117/904 ,  Y10S438/967

摘要： This invention relates to improvements in the SOS technology including the so-called laser annealing processing. According to this invention, the semiconductor layer (2) of an SOS structure (1, 2) consists of the three layers of an interface layer made up of twins, a seed crystalline layer and a re-grown layer far thicker than the preceding two layers when viewed from the side of an insulating substrate. The re-grown layer is formed in such a way that the semiconductor layer (2) deposited on the insulating substrate (1) is irradiated with an electromagnetic wave, for example, a pulsed ruby laser beam, which is absorbed substantially uniformly by a portion except the interface layer and the seed crystalline layer. According to this invention, the quality of the re-grown layer is improved, and the mobility of carriers is enhanced. As a result, the operating speed of a semiconductor device employing the SOS structure (1, 2) is raised, and the leakage current is reduced.

公开(公告)号：EP0197531B1

公开(公告)日：1993-07-28

申请号：EP86104695.1

申请日：1986-04-07

申请人： HITACHI, LTD.

发明人： Mimura, Akio ,  Hosokawa, Yoshikazu ,  Suzuki, Takaya ,  Aoyama, Takashi ,  Konishi, Nobutake ,  Misawa, Yutaka ,  Miyata, Kenji

IPC分类号： H01L29/54 ,  H01L29/78 ,  H01L29/52

CPC分类号： H01L29/66757 ,  H01L29/456 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/7866 ,  H01L29/78675

公开(公告)号：EP0128581A1

公开(公告)日：1984-12-19

申请号：EP84106729.1

申请日：1984-06-13

申请人： HITACHI, LTD.

发明人： Kobayashi, Yutaka ,  Fukami, Akira ,  Suzuki, Takaya

IPC分类号： H01L21/20 ,  C30B13/34

CPC分类号： H01L21/76888 ,  H01L21/0242 ,  H01L21/02532 ,  H01L21/02587 ,  H01L21/02667 ,  H01L21/86 ,  Y10S117/90 ,  Y10S148/003 ,  Y10S148/05 ,  Y10S148/071 ,  Y10S148/074 ,  Y10S148/152

摘要： When forming a large number of monocrystalline silicon regions on an insulator sheet, a large number of island regions of polycrystalline silicon are connected to one another in a predetermined direction by connecting regions, and are sequentially melted and regrown in that predetermined direction.

摘要翻译： 当在上绝缘体片上形成大量的单晶硅区域的，大量的多晶硅冰岛区域由连接区域彼此连接在一预定方向上，并且被熔化依次再生长在没有规定的方向。

公开(公告)号：EP0042175A2

公开(公告)日：1981-12-23

申请号：EP81104653.1

申请日：1981-06-16

申请人： Hitachi, Ltd.

发明人： Kobayashi, Yutaka ,  Suzuki, Takaya

IPC分类号： H01L21/268 ,  H01L29/78 ,  H01L27/12

CPC分类号： H01L27/12 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/0245 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/268 ,  H01L29/78657 ,  Y10S117/904 ,  Y10S438/967

摘要： This invention relates to improvements in the SOS technology including the so-called laser annealing processing. According to this invention, the semiconductor layer (2) of an SOS structure (1, 2) consists of the three layers of an interface layer made up of twins, a seed crystalline layer and a re-grown layer far thicker than the preceding two layers when viewed from the side of an insulating substrate. The re-grown layer is formed in such a way that the semiconductor layer (2) deposited on the insulating substrate (1) is irradiated with an electromagnetic wave, for example, a pulsed ruby laser beam, which is absorbed substantially uniformly by a portion except the interface layer and the seed crystalline layer. According to this invention, the quality of the re-grown layer is improved, and the mobility of carriers is enhanced. As a result, the operating speed of a semiconductor device employing the SOS structure (1, 2) is raised, and the leakage current is reduced.

公开(公告)号：EP0239958B1

公开(公告)日：1993-06-02

申请号：EP87104622.3

申请日：1987-03-27

申请人： HITACHI, LTD.

发明人： Konishi, Nobutake ,  Hosokawa, Yoshikazu ,  Mimura, Akio ,  Suzuki, Takaya ,  Ohwada, Jun-ichi ,  Kawakami, Hideaki ,  Miyata, Kenji

IPC分类号： H01L27/13 ,  G02F1/133 ,  H01L21/82 ,  H01L29/78

CPC分类号： H01L27/1214 ,  G02F1/1368 ,  G02F2202/103 ,  G02F2202/104 ,  H01L21/84 ,  H01L27/1259 ,  H01L29/7839

摘要： Complementary thin film transistors (C-TFT) formed on an insulating substrate, comprising a pair of highly resistive n-type silicon islands (2, 20), a pair of heavily doped n-type regions (12, 13) formed on one (2) of the islands to form source and drain regions of n-channel TFT, a pair of contacts (170, 180) formed on the surface of the other island (20) and establishing a high potential barrier when the underlying region is of n-type and a low potential barrier when the underlying region is inverted to be of p-type. The process for manufacturing complementary TFTs can be simplified significantly.

摘要翻译： 形成在绝缘基板上的互补薄膜晶体管（C-TFT），包括一对高电阻性n型硅岛（2,20），一对重掺杂n型区（12,13） 2）的岛以形成n沟道TFT的源极和漏极区，形成在另一个岛（20）的表面上的一对触点（170,180），并且当下面的区域为n时形成高电势势垒 并且当下面的区域被反转成p型时是低电势势垒。 制造互补TFT的工艺可以大大简化。

公开(公告)号：EP0249204A2

公开(公告)日：1987-12-16

申请号：EP87108356.4

申请日：1987-06-10

申请人： HITACHI, LTD.

发明人： Konishi, Nobutake ,  Miyata, Kenji ,  Hosokawa, Yoshikazu ,  Suzuki, Takaya ,  Mimura Akio

IPC分类号： H01L29/08 ,  H01L29/784

CPC分类号： H01L29/0847 ,  G02F1/1368 ,  H01L29/78621 ,  H01L2029/7863

摘要： This invention relates to the structure of a field effect transistor, which is suitable for liquid crystal display of active matrix scheme and there is disclosed a new structure for the field effect transistor, in which at least one of the source region (3) and the drain region (4) is of multi-layered structure, in which high impurity concentration portions (31, 33, 35; 41, 43, 45) and low impurity concentration portions (32, 34; 42, 44) are alternately superposed on each other.

摘要翻译： 本发明涉及适用于有源矩阵方案的液晶显示的场效应晶体管的结构，并且公开了一种用于场效应晶体管的新结构，其中源极区（3）和 漏极区域（4）为多层结构，其中高杂质浓度部分（31,33,35,41,43,45）和低杂质浓度部分（32,34,42,44）交替重叠在每个 其他。

公开(公告)号：EP0042175B1

公开(公告)日：1987-09-09

申请号：EP81104653.1

申请日：1981-06-16

申请人： Hitachi, Ltd.

发明人： Kobayashi, Yutaka ,  Suzuki, Takaya

IPC分类号： H01L21/268 ,  H01L29/78 ,  H01L27/12

CPC分类号： H01L27/12 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/0245 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/268 ,  H01L29/78657 ,  Y10S117/904 ,  Y10S438/967

公开(公告)号：EP0239958A3

公开(公告)日：1989-11-02

申请号：EP87104622.3

申请日：1987-03-27

申请人： HITACHI, LTD.

发明人： Konishi, Nobutake ,  Hosokawa, Yoshikazu ,  Mimura, Akio ,  Suzuki, Takaya ,  Ohwada, Jun-ichi ,  Kawakami, Hideaki ,  Miyata, Kenji

IPC分类号： H01L27/13 ,  G02F1/133 ,  H01L21/82 ,  H01L29/78

CPC分类号： H01L27/1214 ,  G02F1/1368 ,  G02F2202/103 ,  G02F2202/104 ,  H01L21/84 ,  H01L27/1259 ,  H01L29/7839

摘要： Complementary thin film transistors (C-TFT) formed on an insulating substrate, comprising a pair of highly resistive n-type silicon islands (2, 20), a pair of heavily doped n-type regions (12, 13) formed on one (2) of the islands to form source and drain regions of n-channel TFT, a pair of contacts (170, 180) formed on the surface of the other island (20) and establishing a high potential barrier when the underlying region is of n-type and a low potential barrier when the underlying region is inverted to be of p-type. The process for manufacturing complementary TFTs can be simplified significantly.