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    Electroluminescent laminate with thick film dielectric
    3.
    发明公开
    Electroluminescent laminate with thick film dielectric 失效
    Elektrolumineszenter Verbundstoff mit Dickfilmdielektrikum

    公开(公告)号：EP0758836A2

    公开(公告)日：1997-02-19

    申请号：EP96203180.3

    申请日：1993-05-06

    申请人： WESTAIM TECHNOLOGIES INC.

    发明人： Wu, Xingwei ,  Stiles, James Alexander Robert ,  Foo, Ken Kok ,  Bailey, Philip

    IPC分类号： H05B33/22 ,  H05B33/26 ,  H05B33/10 ,  H05B33/12

    CPC分类号： H05B33/28 ,  H05B33/10 ,  H05B33/12 ,  H05B33/22 ,  H05B33/26 ,  Y10S117/904 ,  Y10S428/917 ,  Y10S438/94

    摘要： A process is described of forming an electroluminescent (EL) display panel formed from an EL laminate having a phosphor layer (22) sandwiched between a front and a rear set of intersecting address lines (14,24), the rear address lines (12) being formed on a substrate (12) having sufficient rigidity to support the laminate and the phosphor layer being separated from the rear address lines by one or more dielectric layers (18,20); the process comprising the steps of: (a) providing a substrate formed with a plurality of through holes (32) patterned to be proximate the ends of the address lines to be subsequently formed; (b) forming a conductive path through each of the through holes in the substrate to provide for electrical connection of each address line, subsequently formed, to the voltage driving circuit (30); (c) forming the rear spaced address lines (14) on the substrate (12), one end of each line ending adjacent a through hole (32) and being electrically connected with the conductive path therethrough; (d) forming a dielectric layer (18,20) on the rear address lines (14); (e) forming the phosphor layer (22) above the dielectric layer: (f) optionally forming a transparent dielectric layer on the phosphor layer; and then (g) forming the front spaced address lines (24) on the underlying phosphor or transparent dielectric layer, one end of each line ending adjacent a through hole and being electrically connected with the conductive path therethrough.
    The invention also describes a method for laser scribing a pattern in a planar laminate (preferably an EL panel) having at least one overlying layer (e.g. a transparent layer for forming the front address lines (24)) and at least one underlying layer (e.g. a phosphor layer (22)); the method comprising: applying a focused laser beam on the overlying layer side of the laminate, said laser beam having a wavelength which is substantially unabsorbed by the overlying layer (24) but which is absorbed by the underlying layer (22), such that at least a portion of the underlying layer (22) is directly ablated and the overlying layer (24) is indirectly ablated throughout its thickness (thereby forming individual front address lines (24)).

    摘要翻译： 描述了形成由EL层叠体形成的电致发光（EL）显示面板的方法，该层压体具有夹在前后一组交叉地址线（14,24）之间的荧光层（22），后地址线（12） 形成在具有足够的刚度以支撑所述层压体的基底（12）上，并且所述荧光体层通过一个或多个介电层（18,20）与所述后地址线分离; 所述方法包括以下步骤：（a）提供形成有多个通孔（32）的基板，所述多个通孔（32）图案化以接近要随后形成的地址线的末端; （b）形成穿过基板中每个通孔的导电路径，以提供随后形成的每个地址线与电压驱动电路（30）的电连接; （c）在衬底（12）上形成后隔开的地址线（14），每条线的一端与通孔（32）相邻并且与导电通路电连接; （d）在后地址线（14）上形成电介质层（18,20）; （e）在电介质层上形成荧光体层（22）：（f）可选地在荧光体层上形成透明电介质层; 然后（g）在下面的荧光体或透明电介质层上形成前面分开的地址线（24），每条线的一端与通孔相邻并且与导电通路电连接。 本发明还描述了一种用于在具有至少一个上覆层（例如，用于形成前地址线（24）的透明层）的平面层压板（优选EL板）中激光刻划图案的方法和至少一个下层（例如， 磷光体层（22））; 所述方法包括：将聚焦激光束施加在所​​述层压体的覆盖层侧上，所述激光束具有基本上未被所述上覆层（24）吸收但被所述下层（22）吸收的波长，使得在 下层（22）的至少一部分被直接烧蚀，并且覆盖层（24）在整个厚度上被间接消融（从而形成单独的前地址线（24））。

    Method of growing semiconductor crystal and semiconductor fabricating apparatus
    4.
    发明公开
    Method of growing semiconductor crystal and semiconductor fabricating apparatus 失效
    一种用于生长其育种的半导体晶体和装置的方法

    公开(公告)号：EP0730292A1

    公开(公告)日：1996-09-04

    申请号：EP95116337.7

    申请日：1995-10-17

    申请人： FUJI XEROX CO., LTD.

    发明人： Miyamoto, Yasuaki, c/o Fuji Xerox Co., Ltd. ,  Asai, Ichirou, c/o Fuji Xerox Co., Ltd.

    IPC分类号： H01L21/20

    CPC分类号： H01L21/02667 ,  C30B25/18 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/02678 ,  H01L21/02686 ,  H01L21/2022 ,  Y10S117/904

    摘要： The first feature of the present invention resides in that in a method of semiconductor crystallization, comprising a characteristic determining step of applying first crystallizing energy to a predetermined area of an amorphous semiconductor thin film to determine the size of an area so as to form a single crystal nucleus on the area; and a polycrystalline semiconductor thin film forming step of forming a polycrystalline semiconductor thin film from the amorphous semiconductor thin film, the polycrystalline semiconductor thin film forming step, comprises: a film forming step of forming an amorphous semiconductor thin film on the surface of a substrate; a first crystallizing step of applying first crystallizing energy at regular intervals on the area having the size determined by the characteristic determining step of the amorphous semiconductor thin film; and a second crystallizing step of applying second crystallizing energy to the amorphous semiconductor thin film to grow the crystal of the amorphous semiconductor thin film from the crystal nucleus formed by the first crystallizing step.

    摘要翻译： 本发明的第一特征中“”在半导体结晶的制造方法，包括将第一结晶能量到非晶半导体薄膜的确定性矿的预定区域的区域的大小的特性确定性挖掘步骤，从而形成一个单一的驻留 上的区域晶核; 和多晶半导体薄膜形成由无定形半导体薄膜形成的多晶半导体薄膜的工序中，将多晶半导体薄膜形成工序中，包括：一个基片的表面上的非晶半导体薄膜的形成的膜形成工序; 施加在第一上的区域规则的间隔具有大小确定由非晶半导体薄膜的特性确定性采矿开采步骤结晶能的第一结晶化工序; 和施加第二结晶化的能量来使非晶半导体薄膜从由第一结晶步骤中形成的晶核生长非晶半导体薄膜的晶体的第二结晶化工序。

    Wafer with epitaxial layer having a low defect density
    6.
    发明公开
    Wafer with epitaxial layer having a low defect density 失效
    晶莹剔透的Fehlerdichte。

    公开(公告)号：EP0644588A1

    公开(公告)日：1995-03-22

    申请号：EP94113145.0

    申请日：1994-08-23

    申请人： KOMATSU ELECTRONIC METALS CO., LTD

    发明人： Uemura, Noriyuki ,  Motoura, Hisami ,  Nishimura, Masashi ,  Kohno, Mitsuo

    IPC分类号： H01L21/66 ,  G01N21/88

    CPC分类号： C30B13/00 ,  C30B15/00 ,  C30B29/06 ,  Y10S117/904 ,  Y10S438/974

    摘要： There is provided a high quality epitaxial wafer on which the density of microscopic defects in the epitaxial layer is reduced to keep the gate oxide integrity thereof sufficiently high and to reduce the leakage current at the P-N junction thereof when devices are incorporated, thereby improving the yield of such devices. In an epitaxial wafer obtained by forming an epitaxial layer on a substrate, the density of IR laser scatterers is 5 x 10⁵ pieces/cm³ or less throughout the epitaxial layer.

    摘要翻译： 提供了一种高质量的外延晶片，其中外延层中的微观缺陷的密度降低，以保持其栅极氧化物完整性足够高，并且当器件被并入时，其PN结处的漏电流减小，从而提高产量 的这种设备。 在通过在衬底上形成外延层获得的外延晶片中，IR激光散射体的密度在整个外延层中为5×10 5个/ cm 3或更小。

    Epitaxial growth process and growing apparatus
    8.
    发明授权
    Epitaxial growth process and growing apparatus 失效
    方法和设备的外延生长。

    公开(公告)号：EP0368651B1

    公开(公告)日：1994-09-07

    申请号：EP89311586.5

    申请日：1989-11-09

    申请人： FUJITSU LIMITED

    发明人： Mukai, Ryoichi

    IPC分类号： C30B25/10 ,  C30B29/06

    CPC分类号： H01L21/02532 ,  C30B25/105 ,  C30B29/06 ,  C30B29/08 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02661 ,  Y10S117/904 ,  Y10S148/017 ,  Y10S438/974

    摘要： A process of epitaxially growing a semiconductor Si, Ge or SiGe single crystal layer on a semiconductor (Si or Ge) single crystal substrate, comprising the steps of: allowing a raw material gas (e.g., Si2H6 , GeH4) for the layer and a fluoride gas (e.g., Si2F6 , GeF4 , BF) of at least one element selected from the group consisting of the semiconductor element of the layer and a dopant for the layer to simultaneously flow over the substrate; and applying an ultraviolet light to the substrate to decompose the gases by an ultraviolet light excitation reaction to deposit the layer on the surface of the substrate heated at a temperature of from 250 to 400 DEG C. Prior to the epitaxial growth of the semiconductor layer, the substrate is cleaned by allowing the fluoride gas to flow over the substrate having a temperature of from a room temperature to 500 DEG C, and by irradiating an ultraviolet light to the substrate to remove a natural oxide layer from the substrate surface.

    Ceramic superconductor and method of preparing the same
    9.
    发明公开
    Ceramic superconductor and method of preparing the same 失效
    Supraleitende Keramik und Verfahren zu ihrer Herstellung。

    公开(公告)号：EP0457277A2

    公开(公告)日：1991-11-21

    申请号：EP91107796.4

    申请日：1991-05-14

    申请人： ENGINEERING RESEARCH ASSOCIATION FOR SUPERCONDUCTIVE GENERATION EQUIPMENT AND MATERIALS

    发明人： Hayashi, Kazuhiko, c/o Osaka Works

    IPC分类号： H01L39/24 ,  H01L39/12 ,  C04B35/50 ,  C04B35/00

    CPC分类号： C30B29/225 ,  C30B13/00 ,  H01L39/126 ,  H01L39/2448 ,  Y10S117/904 ,  Y10S505/733 ,  Y10S505/74 ,  Y10S505/782 ,  Y10S505/785

    摘要： A Bi-Sr-Ca-Cu-O ceramic superconductor contains 0112 phases which are finely dispersed in a 2212-phase matrix with its c-axis oriented perpendicular to a growth direction.
    A method of preparing a Bi-Sr-Ca-Cu-O ceramic superconductor comprises the steps of growing crystals under conditions satisfying:

    G/R ≧ 1 and G·R ≧ 10000

    where G (K/cm) represents the temperature gradient at a solid-liquid interface and R (mm/h) represents the rate of crystal growth, and annealing the grown crystals in an atmosphere having oxygen partial pressure of at least 0.05 atm. within a temperature range of 800 to 860°C for at least 2 hours.

    摘要翻译： Bi-Sr-Ca-Cu-O陶瓷超导体包含0112相，其细分散在2212相基体中，其c轴垂直于生长方向取向。 制备Bi-Sr-Ca-Cu-O陶瓷超导体的方法包括在满足以下条件下生长晶体的步骤：G / R> / = 1和GR> / = 10000其中G（K / cm）表示温度梯度 在固 - 液界面处，R（mm / h）表示晶体生长速率，并且在氧分压至少为0.05atm的气氛中退火生长的晶体。 在800至860℃的温度范围内至少2小时。