6F2 NON-VOLATILE MEMORY BITCELL
    1.
    发明公开

    公开(公告)号:EP3123474A4

    公开(公告)日:2017-11-29

    申请号:EP14887120

    申请日:2014-03-28

    申请人: INTEL CORP

    发明人: WANG YIH

    摘要: An apparatus including an array of memory cells arranged in a grid defined by word lines and bit lines in a generally orthogonal orientation relative to one another, a memory cell including a resistive memory component and an access transistor, wherein the access transistor includes a diffusion region disposed at an acute angle relative to an associated word line. A method including etching a substrate to form a plurality of fins each including a body having a length dimension including a plurality of first junction regions and a plurality of second junction regions that are generally parallel to one another and offset by angled channel regions displacing in the length dimension an end of a first junction region from the beginning of a second junction region; removing the spacer material; and introducing a gate electrode on the channel region of each of the plurality of fins.