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公开(公告)号:EP4109345A1
公开(公告)日:2022-12-28
申请号:EP22164591.4
申请日:2022-03-25
申请人: Intel Corporation
发明人: CHINYA, Gautham , MATHAIKUTTY, Deepak , MOHAPATRA, Debabrata , KIM, Sang Kyun , RAHA, Arnab , BRICK, Cormac
IPC分类号: G06N3/04 , G06N3/063 , H03K19/20 , H03K19/177 , G06F7/544
摘要: Methods, apparatus, systems, and articles of manufacture to load data into an accelerator are disclosed. An example apparatus includes data provider circuitry to load a first section and an additional amount of compressed machine learning parameter data into a processor engine. Processor engine circuitry executes a machine learning operation using the first section of compressed machine learning parameter data. A compressed local data re-user circuitry determines if a second section is present in the additional amount of compressed machine learning parameter data. The processor engine circuitry executes a machine learning operation using the second section when the second section is present in the additional amount of compressed machine learning parameter data.
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公开(公告)号:EP4437456A1
公开(公告)日:2024-10-02
申请号:EP22899259.0
申请日:2022-10-14
申请人: Intel Corporation
发明人: RAHA, Arnab , MOHAPATRA, Debabrata , MATHAIKUTTY, Deepak Abraham , SUNG, Raymond Jit-Hung , BRICK, Cormac Michael
CPC分类号: G06F2207/482420130101 , G06F7/76 , G06F7/5443 , G06N3/08 , G06N3/063 , G06N3/048 , G06N3/045
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公开(公告)号:EP4330860A1
公开(公告)日:2024-03-06
申请号:EP22796343.6
申请日:2022-03-21
申请人: Intel Corporation
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公开(公告)号:EP4109236A1
公开(公告)日:2022-12-28
申请号:EP22164550.0
申请日:2022-03-25
申请人: INTEL Corporation
发明人: KRISHNAMURTHY, Ram , ANDERS, Mark , KAUL, Himanshu , CHINYA, Gautham , POWER, Martin , MOHAPATRA, Debabrata , RAHA, Arnab , LANGHAMMER, Martin , BRICK, Cormac
IPC分类号: G06F7/53
摘要: Systems, apparatuses and methods may provide for multi-precision multiply-accumulate (MAC) technology that includes a plurality of arithmetic blocks, wherein the plurality of arithmetic blocks each contain multiple multipliers, and wherein the logic is to combine multipliers one or more of within each arithmetic block or across multiple arithmetic blocks. In one example, one or more intermediate multipliers are of a size that is less than precisions supported by arithmetic blocks containing the one or more intermediate multipliers.
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公开(公告)号:EP4433897A1
公开(公告)日:2024-09-25
申请号:EP22896300.5
申请日:2022-10-14
申请人: Intel Corporation
发明人: MOHAPATRA, Debabrata , RAHA, Arnab , MATHAIKUTTY, Deepak Abraham , SUNG, Raymond Jit-Hung , BRICK, Cormac Michael
CPC分类号: G06F7/5443 , G06F2207/482420130101 , G06F9/3012 , G06N3/063 , G06N3/084 , G06N3/048 , G06N3/045
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公开(公告)号:EP4427132A1
公开(公告)日:2024-09-11
申请号:EP22890594.9
申请日:2022-10-04
申请人: Intel Corporation
CPC分类号: G06F2207/482420130101 , G06F7/485 , G06N3/063 , G06F15/7867 , G06N3/045
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