公开(公告)号：EP0216157B1

公开(公告)日：1990-10-24

申请号：EP86111641.6

申请日：1986-08-22

申请人： International Business Machines Corporation

发明人： Iyer, Subramanian Srikanteswara ,  Joshi, Rajiv Vasant

IPC分类号： H01L21/285 ,  H01L21/60

CPC分类号： H01L21/76879 ,  C23C16/0281 ,  C23C16/04 ,  C23C16/06 ,  C23F4/00 ,  H01L21/28562

公开(公告)号：EP0288691A1

公开(公告)日：1988-11-02

申请号：EP88103370.8

申请日：1988-03-04

申请人： International Business Machines Corporation

发明人： Iyer, Subramanian Srikanteswara ,  Stork, Johannes Maria Cornelis

IPC分类号： H01L21/203 ,  H01L21/76 ,  H01L21/285

CPC分类号： H01L29/66272 ,  H01L21/033 ,  H01L21/76202 ,  H01L29/732 ,  Y10S148/011

摘要： A process for fabricating a bipolar transistor structure having device and isolation regions fully self-aligned. The transistor is fabricated using a process wherein collector (12), base (14) and emitter (16) layers are sequentially formed on a semiconductor substrate (10) by a molecular beam epitaxy technique. The emitter layer is covered by insulation layers and a photoresist layer is then formed on the insulation layer. The photoresist layer is masked, exposed and developed to provide a pattern which is used as an etch mask to form both the device emitter area (26) and isolation areas (28). The isolation areas (28), the emitter region (26) and the base (14) and collector (12) regions are therefore formed.

摘要翻译： 一种用于制造具有完全自对准的器件和隔离区的双极晶体管结构的工艺。 使用其中集电极（12），基极（14）和发射极（16）层通过分子束外延技术顺序地形成在半导体衬底（10）上的工艺来制造晶体管。 发射极层被绝缘层覆盖，然后在绝缘层上形成光致抗蚀剂层。 光致抗蚀剂层被掩模，曝光和显影以提供用作蚀刻掩模以形成器件发射极区域（26）和隔离区域（28）的图案。 因此形成隔离区域（28），发射极区域（26）和基极（14）以及集电极（12）区域。

公开(公告)号：EP0111706A1

公开(公告)日：1984-06-27

申请号：EP83110954.1

申请日：1983-11-03

申请人： International Business Machines Corporation

发明人： Iyer, Subramanian Srikanteswara

IPC分类号： H01L29/60 ,  H01L21/28

CPC分类号： H01L29/4983 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66575

摘要： Recesses (13) are formed in the sidewall isolation (7,8,9) of the polysilicon gate (6) of a field effect transistor in order that a subsequently deposited metal film becomes discontinuous over the sidewall isolation. The recesses eliminate possible silicon diffusion paths over the sidewall isolation.
The sidewall isolation is composed of layers (7, 8, 9) of different insulating materials (eg silicon dioxide (7, 9) and silicond nitride (8)) which can be differentially etched to provide the recesses (13) in the central layer (8).

摘要翻译： 凹部（13）在侧壁绝缘形成（7，8，9）的多晶硅栅（6），以便一个场效应晶体管的并随后沉积的金属膜成为在侧壁隔离不连续的。 凹部消除在侧壁绝缘可能硅的扩散路径。 侧壁绝缘是由层（7，8，9）不同的绝缘材料（例如二氧化硅（7,9）和silicond氮化物（8）），它可以被差别蚀刻以提供在中心层中的凹部（13） （8）。

公开(公告)号：EP0603461A3

公开(公告)日：1996-09-25

申请号：EP93112283.2

申请日：1993-07-30

申请人： International Business Machines Corporation

发明人： Iyer, Subramanian Srikanteswara ,  Thompson, Richard Dean ,  Tu, King-Ning

IPC分类号： H01L21/74 ,  H01L23/535

CPC分类号： H01L21/743 ,  H01L23/535 ,  H01L2924/0002 ,  H01L2924/00

摘要： An epitaxial conductor and a method for forming buried conductor patterns is described incorporating a layer (10) of single crystalline silicon, a pattern formed therein such as a trench (14), a layer (26) of metal silicide epitaxial formed on the bottom surface (18) of the pattern or trench (14), a layer (28) of silicon epitaxially formed thereover, and a layer (30) of metal silicide epitaxially formed over the silicon layer (28). The invention overcomes the problem of twinning defects in the top surface of epitaxial silicide layers.

公开(公告)号：EP0563625A2

公开(公告)日：1993-10-06

申请号：EP93103647.9

申请日：1993-03-08

申请人： International Business Machines Corporation

发明人： Bassous, Ernest ,  Halbout, Jean-Marc ,  Iyer, Subramanian Srikanteswara ,  Kesan, Vijay Panchapa

IPC分类号： H01L33/00 ,  H01L21/306

CPC分类号： H01L33/346 ,  H01L21/306 ,  H01L33/0054

摘要： A system for making porous silicon on blank and patterned Si substrates by "immersion scanning", particularly suitable for fabricating light-emitting Si devices and utilizing an open electrolytic cell having a cathode and an opposing anode consisting of a Si substrate on which the porous silicon is to be formed, both disposed, with their opposing surfaces in parallel, in an aqueous HF solution electrolyte contained in the cell. The substrate anode is mounted to be movable relative to the electrolyte so as to be mechanically cycled or scanned in and out of the electrolyte at a programmable rate during anodization. The uniformity, thickness and porosity of the resulting anodized layer on the substrate are determined by the scanning speed, number of cycles, current density, and HF-based electrolyte concentration parameters of the system, and the Si substrate resistivity, conductivity type, and crystal orientation. The light-emitting silicon devices produced incorporate porous silicon layers and are operable at room temperature.

摘要翻译： 一种用于在坯件制作的多孔硅和系统图案化的Si衬底由“浸没扫描”，特别适合用于制造发光Si器件和利用具有阴极打开电解池，并在相对的阳极组成的Si衬底的在其上的多孔硅 是在细胞中所含wässrigeHF溶液电解质中形成，均设置，具有在平行其相对表面，英寸 基板阳极安装成可相对于所述可动电解质以机械地循环或在阳极氧化期间的可编程速率和流出电解质的扫描。 的均匀性，厚度和在基片上所得到的阳极氧化层的孔隙率被确定由扫描速度，循环次数，电流密度，并且该系统的基于HF的电解质浓度参数开采，以及Si衬底的电阻率，导电类型，并且晶体 方向。 发光硅器件产生的伴侣多孔硅层，并且可操作在室温下。

公开(公告)号：EP0433552A2

公开(公告)日：1991-06-26

申请号：EP90115903.8

申请日：1990-08-20

申请人： International Business Machines Corporation

发明人： May, Paul Graham ,  Iyer, Subramanian Srikanteswara

IPC分类号： G02F1/025

CPC分类号： G02F1/025 ,  G02F1/2257 ,  G02F2001/0152 ,  G02F2001/212 ,  G02F2202/105

摘要： An optical modulator (30) includes a waveguide region having, for radiation of a predetermined wavelength such as 1.3 microns, a variable optical transmittance characteristic. The optical transmittance characteristic is a function of a difference between an index of refraction of a first region (36) comprised of silicon having a first type of electrical conductivity and an index of refraction of a second adjacent region (34) comprised of an insulator such as a silicon dioxide. The modulator further includes a third region (38), also comprised of silicon, disposed adjacent to the first region. The third region has a second type of electrical conductivity for forming a p-n junction with the first region. Charge carriers are injected into the first region for varying the index of refraction thereof such that the optical transmittance characteristic of the waveguide region is varied.

摘要翻译： 光调制器（30）包括波导区域，其具有用于放射预定波长（例如1.3微米）的可变光透射特性。 光透射率特性是由包含第一类电导率的硅构成的第一区域（36）与由绝缘体构成的第二相邻区域（34）的折射率之间的折射率之差的函数， 作为二氧化硅。 所述调制器还包括邻近所述第一区域布置的第三区域（38），其也由硅构成。 第三区域具有用于与第一区域形成p-n结的第二类型的导电性。 电荷载体被注入到第一区域中以改变其折射率，使得波导区域的光透射特性变化。

公开(公告)号：EP0433552A3

公开(公告)日：1992-04-08

申请号：EP90115903.8

申请日：1990-08-20

申请人： International Business Machines Corporation

发明人： May, Paul Graham ,  Iyer, Subramanian Srikanteswara

IPC分类号： G02F1/025

CPC分类号： G02F1/025 ,  G02F1/2257 ,  G02F2001/0152 ,  G02F2001/212 ,  G02F2202/105

摘要： An optical modulator (30) includes a waveguide region having, for radiation of a predetermined wavelength such as 1.3 microns, a variable optical transmittance characteristic. The optical transmittance characteristic is a function of a difference between an index of refraction of a first region (36) comprised of silicon having a first type of electrical conductivity and an index of refraction of a second adjacent region (34) comprised of an insulator such as a silicon dioxide. The modulator further includes a third region (38), also comprised of silicon, disposed adjacent to the first region. The third region has a second type of electrical conductivity for forming a p-n junction with the first region. Charge carriers are injected into the first region for varying the index of refraction thereof such that the optical transmittance characteristic of the waveguide region is varied.

公开(公告)号：EP0231794A3

公开(公告)日：1989-03-01

申请号：EP87100546.8

申请日：1987-01-16

申请人： International Business Machines Corporation

发明人： Iyer, Subramanian Srikanteswara ,  Rothenberg, Joshua Elliot

IPC分类号： H01L21/285 ,  H01L21/268 ,  H01L21/90

CPC分类号： H01L21/268 ,  H01L21/28518

摘要： The method creates a smooth interface in a low resistance metal silicide/silicon structure particularly by the step of: Exposing the surface of a metal, like titanium, deposited on a silicon substrate radiation to reduce the oxide at said interface. On reacting said metal a metal silicide/silicon structure having a smooth interface is produced. The apparatus suitable for fabricat­ing such structures comprises: A chamber for containing a metal/­silicon structure, a pulsed laser device for producing pulses of ultraviolet radiation, and means for directing said pulses of ultraviolet radiation onto said metal silicide/silicon structure for causing an oxide reduction at said metal/silicon interface. The method and apparatus are used in forming - especially VLSI - ­integrated circuits.

公开(公告)号：EP0216157A2

公开(公告)日：1987-04-01

申请号：EP86111641.6

申请日：1986-08-22

申请人： International Business Machines Corporation

发明人： Iyer, Subramanian Srikanteswara ,  Joshi, Rajiv Vasant

IPC分类号： H01L21/285 ,  H01L21/60

CPC分类号： H01L21/76879 ,  C23C16/0281 ,  C23C16/04 ,  C23C16/06 ,  C23F4/00 ,  H01L21/28562

摘要： Metal, such as tungsten, contact regions for an integrated circuit are deposited on exposed portions of a silicon substrate having an apertured silicon dioxide layer thereon by the steps of:

(1) disposing the substrate in a deposition chamber;
(2) introducing a gaseous compound of a metal into the cham­ber, which compound reacts with silicon so that metal from the compound substitutes for silicon in the surface of the subst­rate to form a deposited metal layer in the apertures in the silicon dioxide layer; and
(3) introducing hydrogen into the chamber in addition to the gaseous compound whereby the hydrogen reacts with the gaseous compound to form a further deposition of the metal, the metal being deposited during said further deposition on the surface of both the previously deposited metal layer and the silicon dioxide layer.

During step (3) an etching gas (e.g nitrogen trifluoride) which etches the metal when activated, is introduced into the chamber and a plasma struck to activate the etching gas. By controlling the amount of the etching gas introduced into the chamber and the elec­trical power coupled into the plasma, the silicon surface portions of the substrate are kept substantially free of the metal and a further deposit of the metal is produced on the previously deposited metal layer.

摘要翻译： 诸如钨的金属，用于集成电路的接触区域通过以下步骤沉积在其上具有有孔二氧化硅层的硅衬底的暴露部分上：......（1）将衬底设置在沉积室中; ...（2）将金属的气态化合物引入室中，该化合物与硅反应，使得来自化合物的金属在基材的表面中代替硅，以在二氧化硅层的孔中形成沉积的金属层; 和（3）除了气体化合物之外还将氢气引入室中，由此氢气与气态化合物反应以形成金属的进一步沉积，金属在所述另外沉积期间沉积在先前沉积的金属的表面上 层和二氧化硅层。 在步骤（3）期间，在激活时蚀刻金属的蚀刻气体（例如三氟化氮）被引入到腔室中，并且等离子体被击打以激活蚀刻气体。 通过控制引入室中的蚀刻气体的量和耦合到等离子体中的电功率，基板的硅表面部分保持基本上不含金属，并且在预先沉积的金属层上产生进一步的金属沉积 。

公开(公告)号：EP0651439A2

公开(公告)日：1995-05-03

申请号：EP94116091.3

申请日：1994-10-12

申请人： International Business Machines Corporation

发明人： Ek, Bruce A. ,  Iyer, Subramanian Srikanteswara ,  Pitner, Philip Michael ,  Powell, Adrian R. ,  Tejwani, Manu Jamnadas

IPC分类号： H01L21/86

CPC分类号： H01L21/02532 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502

摘要： A process and method for producing strained and defect free semiconductor layers. In a preferred embodiment, silicon on insulator may be used as a substrate for the growth of fully relaxed SiGe buffer layers. A new strain relief mechanism operates, whereby the SiGe layer relaxes without the generation of threading dislocations within the SiGe layer. This is achieved by depositing SiGe on an SOI substrate with a superficial silicon thickness. Initially the strain in the SiGe layer becomes equalized with the thin Si layer by creating tensile strain in the Si layer. Then the strain created in the thin Si layer is relaxed by plastic deformation during an anneal. Since dislocations are formed, and glide in the thin Si layer, threading dislocations are not introduced into the upper SiGe material. A strained silicon layer for heterostructures may then be formed on the SiGe material.

摘要翻译： 一种制造应变和无缺陷半导体层的方法和方法。 在优选实施例中，绝缘体上硅可以用作用于生长完全松弛的SiGe缓冲层的衬底。 新的应变消除机构工作，由此SiGe层松弛，而不会在SiGe层内产生穿透位错。 这通过在具有表面硅厚度的SOI衬底上沉积SiGe来实现。 最初，通过在Si层中产生拉伸应变，SiGe层中的应变与薄Si层均匀。 那么在薄Si层中产生的应变在退火过程中被塑性变形所松弛。 由于形成了位错，并且在薄的Si层中滑动，所以穿透位错不被引入上部SiGe材料。 然后可以在SiGe材料上形成用于异质结构的应变硅层。