公开(公告)号：EP4407656A1

公开(公告)日：2024-07-31

申请号：EP23153656.6

申请日：2023-01-27

Applicant: Epinovatech AB

Inventor： OLSSON, Martin Andreas

IPC: H01L21/02

CPC classification number: H01L21/02458 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02647

Abstract: A semiconductor structure (1), comprising:
a substrate (2);
a base layer (10), the base layer (10) comprising an AlGaN layer, the base layer (10) being arranged above the substrate (2);
at least one group of layers (20), the at least one group of layers (20) being arranged above the base layer (10), wherein each of the at least one group of layers (20) comprises:
a first layer (21), the first layer (21) being a layer of InGaN and comprising quantum dots (24);
a second layer (22), the second layer (22) being a layer of InGaN, the second layer (22) being arranged on and above the first layer (21), wherein the second layer (22) laterally encloses the quantum dots (24) of the first layer (21), wherein a material composition of the InGaN of the second layer (22) is different from a material composition of the InGaN of the first layer (21).

公开(公告)号：EP4220686B1

公开(公告)日：2024-07-10

申请号：EP22154292.1

申请日：2022-01-31

IPC: H01L21/20

CPC classification number: H01L21/0245 ,  H01L21/02532 ,  H01L21/02381 ,  H01L21/0262 ,  H01L21/0251 ,  H01L21/02502

公开(公告)号：EP4231335B1

公开(公告)日：2024-06-19

申请号：EP22156958.5

申请日：2022-02-16

IPC: H01L21/322 ,  H01L21/205

CPC classification number: H01L21/02381 ,  H01L21/02458 ,  H01L21/02447 ,  H01L21/3223 ,  H01L21/0254 ,  H01L21/02658 ,  H01L21/02433 ,  H01L21/02502

公开(公告)号：EP4371148A1

公开(公告)日：2024-05-22

申请号：EP22747610.8

申请日：2022-07-04

Applicant: Paragraf Limited

Inventor： DIXON, Sebastian ,  KAINTH, Jaspreet ,  GUINEY, Ivor ,  BADCOCK, Thomas James

IPC: H01L21/20 ,  H01L21/02

CPC classification number: H01L21/02002 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02527 ,  H01L21/0262

公开(公告)号：EP1437765B1

公开(公告)日：2018-12-26

申请号：EP02767854.9

申请日：2002-08-23

Applicant: SUMCO CORPORATION

Inventor： SHIONO, Ichiro ,  MIZUSHIMA,Kazuki ,  YAMAGUCHI, Kenji

IPC: H01L21/205 ,  H01L21/336

CPC classification number: H01L29/165 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/1054 ,  H01L29/66916

Abstract: Production of a semiconductor substrate having an silicon-germanium (SiGe) layers (2,3) formed on an silicon substrate (1) comprises heat treating at temperatures exceeding epitaxial growth temperature while or after SiGe layers are formed by epitaxial growth and polishing out surface unevenness produced by the heat treatment after the SiGe layers are formed.

公开(公告)号：EP3217436A4

公开(公告)日：2018-06-20

申请号：EP15856987

申请日：2015-08-12

Applicant: AIR WATER INC

Inventor： FUKAZAWA AKIRA ,  OUCHI SUMITO

IPC: H01L29/872 ,  H01L21/20 ,  H01L21/205 ,  H01L21/329 ,  H01L29/26

CPC classification number: H01L29/267 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/20 ,  H01L21/205 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/6606 ,  H01L29/66212 ,  H01L29/872

Abstract: A semiconductor device which can reduce power consumption and a method for manufacturing the same are provided. A semiconductor device comprises an Si (silicon) substrate, an SiC (silicon carbide) layer formed on the surface of the Si substrate, an AlN (aluminum nitride) layer formed on the surface of the SiC layer, an n-type GaN (gallium nitride) layer formed on the surface of the AlN layer, a first electrode formed at the surface side of the GaN layer, and a second electrode formed at the reverse face side of the Si substrate 1. The magnitude of electrical current which flows between the first electrode and the second electrode depends on electrical voltage between the first electrode and the second electrode.

公开(公告)号：EP3151292B1

公开(公告)日：2018-06-06

申请号：EP16188699.9

申请日：2016-09-14

Applicant: Samsung Electronics Co., Ltd. ,  Research & Business Foundation SungKyunKwan University

Inventor： KIM, Sungwng ,  KIM, Eunsung ,  HWANG, Jaeyeol ,  PARK, Seongjun ,  SHIN, Hyeonjin

IPC: H01L35/16 ,  H01L35/34 ,  H01L21/02

CPC classification number: H01L35/16 ,  H01L21/02488 ,  H01L21/02502 ,  H01L35/10 ,  H01L35/18 ,  H01L35/34

Abstract: A thermoelectric structure that may be included in a thermoelectric device may include a thin-film structure that may include a plurality of thin-film layers. The thin-film structure may include Tellurium. The thin-film structure may be on a substrate. The substrate may include an oxide, and a buffer layer may be between the substrate and the thin-film structure. The thermoelectric structure may be manufactured via depositing material ablated from a target onto the substrate. Some material may react with the substrate to form the buffer layer, and thin film layers may be formed on the buffer layer. The thin film layers may be removed from the substrate and provided on a separate substrate. Removing the thin-film layers from the substrate may include removing the thin-film layers from the buffer layer.

公开(公告)号：EP3186836A1

公开(公告)日：2017-07-05

申请号：EP15836954.6

申请日：2015-07-30

Applicant: Konica Minolta Laboratory U.S.A., Inc.

Inventor： AMANO, Jun

IPC: H01L29/06

CPC classification number: H01L31/035236 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  H01L21/02485 ,  H01L21/02499 ,  H01L21/02502 ,  H01L21/02521 ,  H01L21/02568 ,  H01L29/122 ,  H01L29/2003 ,  H01L29/24 ,  H01L29/267 ,  H01L29/861 ,  H01L31/03044 ,  H01L31/0324 ,  H01L31/035209 ,  H01L31/18 ,  H01L33/06 ,  H01L33/26 ,  Y02E10/544

Abstract: A quantum well device includes a first layer of a first two-dimensional material, a second layer of a second two-dimensional material, and a third layer of a third two-dimensional material disposed between the first layer and second layer. The first layer, the second layer, and the third layer are adhered predominantly by van der Waals force.

Abstract translation: 量子阱器件包括设置在第一层和第二层之间的第一二维材料的第一层，第二二维材料的第二层以及第三二维材料的第三层。 第一层，第二层和第三层主要通过范德华力粘附。

公开(公告)号：EP3181516A1

公开(公告)日：2017-06-21

申请号：EP16204332

申请日：2016-12-15

Applicant: SAMSUNG ELECTRONICS CO LTD

Inventor： HYOWON KIM

IPC: B82Y30/00 ,  B82Y40/00 ,  H01L29/16

CPC classification number: H01L29/1606 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/186 ,  C01B32/194 ,  C01B2204/04 ,  H01L21/02381 ,  H01L21/02444 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02527 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02587 ,  H01L21/0262 ,  H01L29/167 ,  H01L29/66045 ,  H01L29/66977 ,  H01L29/778 ,  H01L29/78684

Abstract: A multilayer graphene, a method of forming the same, a device including the multilayer graphene, and a method of manufacturing the device are provided. In the method of forming the multilayer graphene, a first graphene is formed on an underlayer, and then a multilayer graphene is formed on a first area of the first graphene at a first temperature by using a first source gas, the multilayer graphene comprising a portion of the first graphene corresponding to the first area, wherein a temperature used to form the first graphene is different from the first temperature, or a source gas used to form the first graphene is different from the first source gas.

Abstract translation: 一种多层石墨烯，形成相同的方法中，提供了一种器件，包括多层石墨烯，以及制造该装置的方法。 在形成多层石墨烯的方法中，第一石墨烯上形成至底层，然后多层石墨烯是通过使用第一源气体在第一温度下形成在所述第一石墨烯的第一区域，所述多层石墨烯，其包括部 第一石墨烯对应于第一区域的，worin用于形成第一石墨烯的温度是从第一温度，或用于形成所述第一石墨烯的原料气体不同的是从所述第一源气体不同。

公开(公告)号：EP3174677A1

公开(公告)日：2017-06-07

申请号：EP15750002.6

申请日：2015-07-27

Applicant: Saint-Gobain Lumilog

Inventor： BEAUMONT, Bernard ,  FAURIE, Jean-Pierre

IPC: B28D5/02 ,  H01L21/02

CPC classification number: H01L21/0254 ,  H01L21/0242 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02639 ,  H01L33/0075 ,  H01L33/32

Abstract: The invention relates to a process for fabricating a semiconductor including a layer (50) of element-13 nitride comprising active zones (52) for the fabrication of electronic components, and inactive zones (51), the active and inactive zones extending over a front side (53) of the element-13 nitride layer, the concentration of crystal defects in the active zones being lower than the concentration of defects in the inactive zones, the process comprising steps consisting in: using a mask to form, in a starting substrate (10): o first regions for growing the active zones and o second regions (11) for growing the inactive zones, the mask comprising a plurality of apertures each defining an active zone feature on the starting substrate; and growing (700) the element-13 nitride layer comprising the active and inactive zones on the first and second regions, the process being noteworthy in that it furthermore comprises the following steps: receiving a theoretical feature pitch, the theoretical feature pitch corresponding to a desired distance between two adjacent active-zone features on the front side of the element-13 nitride layer; and calculating at least one mask pitch different from the theoretical feature pitch in order to compensate for active-zone feature shifts, the active-zone feature shifts being due to the conditions of growth of the semiconductor, the mask pitch corresponding to a distance between two adjacent apertures in the protective mask.

Abstract translation: 本发明涉及一种用于制造半导体，包括元件-13族氮化物构成的层（50），包括用于电子元件的制造有源区（52），和非活性区（51），活动和非活动区之上延伸的前 在元件13的氮化物层，晶体缺陷在活性区比的缺陷在无效区域中的浓度低的浓度的侧（53），该方法包括步骤在由：利用掩模形成，在起始衬底 （10）：○用于生长有源区和邻用于生长非活性区，所述掩模包括光圈的所述起始衬底有源区特征的每个限定的多个第二区域（11）的第一区域; 和生长（700）的元件13的氮化物层包括在所述第一和第二区域中的活动和非活动区域，则过程是值得注意之处做了进一步包括以下步骤：接收一个理论特征节距，理论特征节距对应于一个 两个相邻的有源区之间所需的距离展示了在元件13的氮化物层的前侧; 并且为了补偿有源区功能偏移计算从所述理论特征节距不同的至少一个掩模间距，有源区功能偏移是由于半导体的生长条件，在掩模间距对应于两个之间的距离 相邻的光圈在防护罩。