公开(公告)号：EP0513521B1

公开(公告)日：1999-06-30

申请号：EP92105953.1

申请日：1992-04-07

申请人： International Business Machines Corporation

发明人： Conru, Ward H. ,  Irish, Gary Hugh ,  Pakulski, Francis Joseph ,  Slattery, William John ,  Starr, Stephen George ,  Ward, William Caroll

IPC分类号： H01L21/50 ,  H01L21/60 ,  H01L23/24 ,  H01L23/495 ,  H01L25/065

CPC分类号： H01L24/32 ,  H01L21/56 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48463 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/85909 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/85399

公开(公告)号：EP0187289A2

公开(公告)日：1986-07-16

申请号：EP85115711.5

申请日：1985-12-10

申请人： International Business Machines Corporation

发明人： Pakulski, Francis Joseph

IPC分类号： G06F12/08

CPC分类号： G06F12/0884

摘要： A hierarchical memory system in which a lower level (40) transfers data serially to an upper level (12) and in parallel to a yet lower level. The lower level includes a two-port memory chip (25) having a wide buffer (28) for parallel accesses to the memory array, to the yet lower level, and to a serial buffer (32). The serial buffer is serially accessed by the upper level simultaneously with accesses to the wide buffer.

公开(公告)号：EP0513521A3

公开(公告)日：1993-07-14

申请号：EP92105953.1

申请日：1992-04-07

申请人： International Business Machines Corporation

发明人： Conru, Ward H. ,  Irish, Gary Hugh ,  Pakulski, Francis Joseph ,  Slattery, William John ,  Starr, Stephen George ,  Ward, William Caroll

IPC分类号： H01L21/50 ,  H01L21/60 ,  H01L23/24 ,  H01L23/495 ,  H01L25/065

CPC分类号： H01L24/32 ,  H01L21/56 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48463 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/85909 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/85399

摘要： This is a semiconductor chip (12) in which the conductive path between the chip and the lead frame (14) via wires (16) can be easily and reproduceably improved. This is accomplished by improving the bond between the wires and the lead frame members to which the wires are joined and by creating additional contacts between each wire and its respective lead even if the bonded contact breaks or fails at or immediately adjacent to the bonding point. This is accomplished by placing an insulating layer (11b) on the active surface of each chip, carrying input and output bonding pads thereon, to which lead frame conductors have been connected by bonding wires. The insulating layer is a thermosetting adhesive (17) and is placed over the lead frame, the bonding wires and the active face of the semiconductor chip so that when a lamination force is applied to the insulating layer the wires will be crushed and held against their respective pads and against the respective leads to which they are connected and the active face of the semiconductor protected by the adhesive bonding thereto. In this way greater contact between the wires and the leads is enhanced and defects or failure in conductivity therebetween reduced or eliminated.

公开(公告)号：EP0513521A2

公开(公告)日：1992-11-19

申请号：EP92105953.1

申请日：1992-04-07

申请人： International Business Machines Corporation

发明人： Conru, Ward H. ,  Irish, Gary Hugh ,  Pakulski, Francis Joseph ,  Slattery, William John ,  Starr, Stephen George ,  Ward, William Caroll

IPC分类号： H01L21/50 ,  H01L21/60 ,  H01L23/24 ,  H01L23/495 ,  H01L25/065

CPC分类号： H01L24/32 ,  H01L21/56 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48463 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/85909 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/85399

摘要： This is a semiconductor chip (12) in which the conductive path between the chip and the lead frame (14) via wires (16) can be easily and reproduceably improved. This is accomplished by improving the bond between the wires and the lead frame members to which the wires are joined and by creating additional contacts between each wire and its respective lead even if the bonded contact breaks or fails at or immediately adjacent to the bonding point.
This is accomplished by placing an insulating layer (11b) on the active surface of each chip, carrying input and output bonding pads thereon, to which lead frame conductors have been connected by bonding wires. The insulating layer is a thermosetting adhesive (17) and is placed over the lead frame, the bonding wires and the active face of the semiconductor chip so that when a lamination force is applied to the insulating layer the wires will be crushed and held against their respective pads and against the respective leads to which they are connected and the active face of the semiconductor protected by the adhesive bonding thereto. In this way greater contact between the wires and the leads is enhanced and defects or failure in conductivity therebetween reduced or eliminated.

摘要翻译： 这是一种半导体芯片（12），其中通过导线（16）在芯片和引线框架（14）之间的导电路径可以容易且可再现地改善。 这是通过改进电线和引线框架构件之间的接合来实现的，并且通过在每个电线和其相应引线之间产生附加接触，即使接合的接触在接合点处或在紧邻接点处断裂或失效。 这通过将绝缘层（11b）放置在每个芯片的有源表面上，在其上承载有引线框架导体已经通过接合线连接的输入和输出接合焊盘来实现。 绝缘层是热固性粘合剂（17），并且放置在引线框架，接合线和半导体芯片的有源面之上，使得当层压力施加到绝缘层时，电线将被压碎并保持在其上 相应的焊盘和与它们连接的相应引线相对，并且半导体被保护的有源面通过粘合剂粘合到其上。 以这种方式，电线和引线之间的更大的接触增强，并且导电性的缺陷或故障减少或消除。

公开(公告)号：EP0187289A3

公开(公告)日：1989-05-03

申请号：EP85115711.5

申请日：1985-12-10

申请人： International Business Machines Corporation

发明人： Pakulski, Francis Joseph

IPC分类号： G06F12/08

CPC分类号： G06F12/0884

摘要： A hierarchical memory system in which a lower level (40) transfers data serially to an upper level (12) and in parallel to a yet lower level. The lower level includes a two-port memory chip (25) having a wide buffer (28) for parallel accesses to the memory array, to the yet lower level, and to a serial buffer (32). The serial buffer is serially accessed by the upper level simultaneously with accesses to the wide buffer.