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公开(公告)号:EP2801105B1
公开(公告)日:2015-11-18
申请号:EP12864109.9
申请日:2012-12-13
IPC分类号: H01L21/336 , H01L29/06 , H01L29/775 , H01L29/786 , H01L29/423 , B82Y40/00 , H01L29/66 , B82Y10/00
CPC分类号: H01L29/42392 , B82Y10/00 , B82Y40/00 , H01L29/0673 , H01L29/068 , H01L29/66439 , H01L29/775 , H01L29/78696
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公开(公告)号:EP2394304A1
公开(公告)日:2011-12-14
申请号:EP10739003.1
申请日:2010-02-02
IPC分类号: H01L29/78
CPC分类号: H01L29/775 , B82Y10/00 , B82Y40/00 , H01L21/02488 , H01L21/02532 , H01L21/02603 , H01L21/0262 , H01L21/02639 , H01L21/02667 , H01L29/0665 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/78696 , Y10S977/762
摘要: Semiconductor-based electronic devices and techniques for fabrication thereof are provided. In one aspect, a device is provided comprising a first pad; a second pad and a plurality of nanowires connecting the first pad and the second pad in a ladder-like configuration formed in a silicon-on-insulator (SOI) layer over a buried oxide (BOX) layer, the nanowires having one or more dimensions defined by a re-distribution of silicon from the nanowires to the pads. The device can comprise a field-effect transistor (FET) having a gate surrounding the nanowires wherein portions of the nanowires surrounded by the gate form channels of the FET, the first pad and portions of the nanowires extending out from the gate adjacent to the first pad form a source region of the FET and the second pad and portions of the nanowires extending out from the gate adjacent to the second pad form a drain region of the FET.
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公开(公告)号:EP2801105A1
公开(公告)日:2014-11-12
申请号:EP12864109.9
申请日:2012-12-13
IPC分类号: H01L21/336
CPC分类号: H01L29/42392 , B82Y10/00 , B82Y40/00 , H01L29/0673 , H01L29/068 , H01L29/66439 , H01L29/775 , H01L29/78696
摘要: A method for forming a nanowire field effect transistor (FET) device includes forming a nanowire over a substrate, forming a liner material around a portion of the nanowire, forming a capping layer on the liner material, forming a first spacer adjacent to sidewalls of the capping layer and around portions of the nanowire, forming a hardmask layer on the capping layer and the first spacer, removing an exposed portion of the nanowire to form a first cavity partially defined by the gate material, epitaxially growing a semiconductor material on an exposed cross section of the nanowire in the first cavity, removing the hardmask layer and the capping layer, forming a second capping layer around the semiconductor material epitaxially grown in the first cavity to define a channel region, and forming a source region and a drain region contacting the channel region.
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