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公开(公告)号：EP1684359A9
公开(公告)日：2006-12-27
申请号：EP06008439.9
申请日：2000-11-20
发明人： Yokogawa, Toshiya , Kitabatake, Makoto , Kusumoto, Osamu Matsushita Electric Industrial , Takahashi, Kunimasa , Uenoyama, Takeshi
IPC分类号： H01L29/78 , H01L29/06 , H01L29/778 , H01L29/772 , H01L29/10
CPC分类号： H01L29/7813 , H01L21/0455 , H01L29/105 , H01L29/1608 , H01L29/365 , H01L29/66068 , H01L29/7725 , H01L29/78 , H01L29/7828 , H01L29/7838
摘要： P-type active region 12 ; n-type source/drain regions 13a and 13b ; gate insulating film 14 made of a thermal oxide film; gate electrode 15 ; source/drain electrodes 16a and 16b , are provided over a p-type Sic substrate 11 . In the active region 12 , p-type heavily doped layers 12a , which are thin enough to create a quantum effect, and thick undoped layers 12b are alternately stacked. when carriers flow, scattering of impurity ions in the active region is reduced, and the channel mobility increases. In the OFF state, a depletion layer expands throughout the active region, and the breakdown voltage increases. As a result of reduction in charges trapped in the gate insulating film or near the interface between the gate insulating film and the active region, the channel mobility further increases.
摘要翻译： P型有源区12; n型源极/漏极区13a和13b; 由热氧化膜构成的栅极绝缘膜14; 栅电极15; 源/漏电极16a和16b设置在p型SiC衬底11上。在有源区12中，交替地形成足够薄以产生量子效应的p型重掺杂层12a和厚非掺杂层12b 堆叠。 当载流子流动时，有源区中杂质离子的散射减少，并且沟道迁移率增加。 在OFF状态下，耗尽层在整个有源区域中扩展，并且击穿电压增加。 由于陷在栅极绝缘膜中或栅极绝缘膜与有源区之间的界面附近的电荷降低，沟道迁移率进一步增加。
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公开(公告)号：EP0829908B1
公开(公告)日：2002-03-20
申请号：EP97116183.1
申请日：1997-09-17
IPC分类号： H01L29/778 , H01L27/092 , H01L21/336 , H01L21/82 , H01L29/45
CPC分类号： H01L29/66431 , H01L21/8238 , H01L21/823807 , H01L27/092 , H01L29/1029 , H01L29/161 , H01L29/7782
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3.发明公开Insulated-gate semiconductor element and method for manufacturing the same 有权HerstellungsverfahrenfürHalbleiterbauelement mit isoliertem Gate
公开(公告)号：EP1032048A1
公开(公告)日：2000-08-30
申请号：EP00103360.4
申请日：2000-02-22
IPC分类号： H01L29/78 , H01L21/336 , H01L21/04 , H01L29/423 , H01L21/265
CPC分类号： H01L29/7813 , H01L21/049 , H01L29/66068
摘要： An insulated-gate semiconductor element having a high breakdown voltage is provided. The surface of a silicon carbide substrate is etched to form a concave portion. A particle beam, for example an ion beam, is irradiated from above, and a defect layer is formed at least in a bottom surface of the concave portion. The substrate is heated in an oxidation atmosphere, and an oxide film is formed at least on a side surface and the bottom surface of the concave portion. A gate electrode is formed on the oxide film. The oxide film at the bottom surface is thicker than at the side surfaces, so that a high breakdown voltage can be ensured, even when the surface of the silicon carbide layer is a face with which a superior epitaxial layer can be attained, such as the (111) Si-face of β -SiC or the (0001) Si-face of α -SiC.
摘要翻译： 提供具有高击穿电压的绝缘栅半导体元件。 蚀刻碳化硅衬底的表面以形成凹部。 从上方照射粒子束，例如离子束，至少在凹部的底面形成有缺陷层。 在氧化气氛中加热基板，至少在凹部的侧面和底面形成氧化膜。 在氧化膜上形成栅电极。 底面的氧化膜比侧面厚，因此即使当碳化硅层的表面是能够获得优异的外延层的面时，也能够确保高的击穿电压，例如 （111）β-SiC的Si面或α-SiC的（0001）Si面。
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公开(公告)号：EP1014435A2
公开(公告)日：2000-06-28
申请号：EP00105417.0
申请日：1997-09-17
IPC分类号： H01L21/335 , H01L29/778
CPC分类号： H01L29/66431 , H01L21/8238 , H01L21/823807 , H01L27/092 , H01L29/1029 , H01L29/161 , H01L29/7782
摘要： Si and SiGeC layers are formed in an NMOS transistor on a Si substrate. A carrier accumulation layer is formed with the use of a discontinuous portion of a conduction band present at the heterointerface between the SiGeC and Si layers. Electrons travel in this carrier accumulation layer serving as a channel. In the SiGeC layer, the electron mobility is greater than in silicon, thus increasing the NMOS transistor in operational speed. In a PMOS transistor, a channel in which positive holes travel, is formed with the use of a discontinuous portion of a valence band at the interface between the SiGe and Si layers. In the SiGe layer, too, the positive hole mobility is greater than in the Si layer, thus increasing the PMOS transistor in operational speed. There can be provided a semiconductor device having field-effect transistors having channels lessened in crystal defect.
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公开(公告)号：EP1032048B1
公开(公告)日：2008-05-28
申请号：EP00103360.4
申请日：2000-02-22
IPC分类号： H01L29/78 , H01L21/336 , H01L21/04 , H01L29/423 , H01L21/265
CPC分类号： H01L29/7813 , H01L21/049 , H01L29/66068
摘要： An insulated-gate semiconductor element having a high breakdown voltage is provided. The surface of a silicon carbide substrate is etched to form a concave portion. A particle beam, for example an ion beam, is irradiated from above, and a defect layer is formed at least in a bottom surface of the concave portion. The substrate is heated in an oxidation atmosphere, and an oxide film is formed at least on a side surface and the bottom surface of the concave portion. A gate electrode is formed on the oxide film. The oxide film at the bottom surface is thicker than at the side surfaces, so that a high breakdown voltage can be ensured, even when the surface of the silicon carbide layer is a face with which a superior epitaxial layer can be attained, such as the (111) Si-face of beta -SiC or the (0001) Si-face of alpha -SiC.
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公开(公告)号：EP0759619B1
公开(公告)日：2001-12-12
申请号：EP96113285.9
申请日：1996-08-20
CPC分类号： B82Y25/00 , B82Y10/00 , G11B2005/3996 , G11C11/14
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7.发明公开Dielectric film with a perovskite structure and method of fabricating the same 审中-公开Dielektrischer Film mit Perwskitstruktur und dessen Herstellungsverfahren
公开(公告)号：EP1078998A2
公开(公告)日：2001-02-28
申请号：EP00117749.2
申请日：2000-08-17
IPC分类号： C23C14/08 , H01L21/02 , H01G4/12 , H01B3/12 , C04B35/47 , C04B35/46 , C04B35/475 , C04B35/468
CPC分类号： H01L28/55 , C23C14/0036 , C23C14/088 , H01B3/12 , H01G4/1227 , H01L21/31122 , H01L21/31691 , Y10S438/957
摘要： A Pt/Ti film is formed on a substrate, and the Pt/Ti film is patterned into a bottom electrode. Subsequently, a SrTiO 3 film, that is, a dielectric film, is formed on the substrate by sputtering using a mixture of an Ar gas, an O 2 gas and a N 2 gas as a film forming gas. The SrTiO 3 film is patterned into a capacitor dielectric film formed on the bottom electrode. A top electrode is then formed on the capacitor dielectric film. Since a N 2 gas is used as the film forming gas in addition to an Ar/O 2 gas, a SrTiO 3 film with a high dielectric constant and small leakage can be formed at a low temperature. By using this SrTiO 3 film, a thin film capacitor with high capacitance and good dielectric characteristics can be obtained.
摘要翻译： 在基板上形成Pt / Ti膜，将Pt / Ti膜图案化为底部电极。 随后，使用Ar气体，O 2气体和N 2气体的混合物作为成膜气体，通过溅射在衬底上形成SrTiO 3膜，即电介质膜。 将SrTiO 3膜图案化成形成在底部电极上的电容器电介质膜。 然后在电容器电介质膜上形成顶部电极。 除了Ar / O 2气体之外，由于使用N 2气体作为成膜气体，所以可以在低温下形成具有高介电常数和小的泄漏的SrTiO 3膜。 通过使用该SrTiO 3膜，可以获得具有高电容和良好介电特性的薄膜电容器。
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公开(公告)号：EP1014435A3
公开(公告)日：2000-11-22
申请号：EP00105417.0
申请日：1997-09-17
IPC分类号： H01L29/778 , H01L27/092 , H01L21/336 , H01L21/82 , H01L29/45
CPC分类号： H01L29/66431 , H01L21/8238 , H01L21/823807 , H01L27/092 , H01L29/1029 , H01L29/161 , H01L29/7782
摘要： Si and SiGeC layers are formed in an NMOS transistor on a Si substrate. A carrier accumulation layer is formed with the use of a discontinuous portion of a conduction band present at the heterointerface between the SiGeC and Si layers. Electrons travel in this carrier accumulation layer serving as a channel. In the SiGeC layer, the electron mobility is greater than in silicon, thus increasing the NMOS transistor in operational speed. In a PMOS transistor, a channel in which positive holes travel, is formed with the use of a discontinuous portion of a valence band at the interface between the SiGe and Si layers. In the SiGe layer, too, the positive hole mobility is greater than in the Si layer, thus increasing the PMOS transistor in operational speed. There can be provided a semiconductor device having field-effect transistors having channels lessened in crystal defect.
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公开(公告)号：EP0759619A2
公开(公告)日：1997-02-26
申请号：EP96113285.9
申请日：1996-08-20
IPC分类号： G11C11/14
CPC分类号： B82Y25/00 , B82Y10/00 , G11B2005/3996 , G11C11/14
摘要： A magnetoresistive effect element having a large magnetoresistive change with a small magnetic field, and a memory element using the same. A semiconductor film 2 to provide a window for excitation light is arranged on a substrate 1 via a buffer layer. Another semiconductor film 3 and a nonmagnetic metallic film (or a nonmagnetic insulating film) 4 are arranged on the semiconductor film 2 successively. A magnetic film 5 having a square magnetization curve is arranged on the nonmagnetic metallic film (or a nonmagnetic insulating film) 4. An electrode 6 is arranged beneath the substrate 1 and another electrode 7 is arranged on the magnetic film 5. By radiating a laser light beam to the semiconductor film acting as a window 2, electrons having spin polarization are excited in the semiconductor film 3 so as to utilize the dependency of the scattering of electrons at the surface of the magnetic film 5 on the magnetization orientation of the magnetic film and the spin polarization state of the excited electrons.
摘要翻译： 具有磁阻小的磁阻变化的磁阻效应元件和使用该磁阻效应元件的存储元件。 用于提供激发光的窗口的半导体膜2经由缓冲层布置在基板1上。 另外的半导体膜3和非磁性金属膜（或非磁性绝缘膜）4依次配置在半导体膜2上。 具有方形磁化曲线的磁性膜5被布置在非磁性金属膜（或非磁性绝缘膜）4上。电极6布置在基底1下方，另一电极7设置在磁性膜5上。通过辐射激光 作为窗口2的半导体膜的光束，在半导体膜3中激发具有自旋极化的电子，以利用在磁性膜5的表面处的电子的散射对磁性膜的磁化取向的依赖性 和激发电子的自旋极化状态。
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公开(公告)号：EP0744777A1
公开(公告)日：1996-11-27
申请号：EP96108361.5
申请日：1996-05-24
IPC分类号： H01L29/861 , H01L45/00
CPC分类号： H01L29/882 , H01L29/8616 , H01L45/10 , H01L45/1206 , H01L45/1233 , H01L45/145 , H01L45/165
摘要： An n-type diffusion layer (10), an insulating layer (11) and a first aluminum electrode (12) are formed on a p-type silicon substrate. Fe 2+ (divalent Fe) having a vacant orbit not filled with an electron is implanted into a region of the insulating layer to form an impurity atom layer (11a). A second aluminum electrode is formed which is in contact with the n-type diffusion layer. A voltage that increases the potential of the first aluminum electrode is applied between the first and second aluminum electrodes. The voltage is increased. In this situation, when the fermi level of the n-type diffusion layer and an impurity level which is the energy level for filling the vacant orbit of the Fe 2+ are matched, a resonance tunnelling current flows. Thereafter, when there is a change to the state of non-resonance state, a negative-resistance characteristic is exhibited in which the current decreases as the voltage is increased. Accordingly, the present invention is able to provide a low-power, low-voltage, fast nonlinear element that can well be incorporated into the integrated circuit, and a bistable memory device employing such an improved nonlinear element.
摘要翻译： 在p型硅衬底上形成n型扩散层（10），绝缘层（11）和第一铝电极（12）。 具有未填充有电子的空位轨道的Fe 2+（二价Fe）注入到绝缘层的区域中以形成杂质原子层（11a）。 形成与n型扩散层接触的第二铝电极。 在第一和第二铝电极之间施加增加第一铝电极电位的电压。 电压增加。 在这种情况下，当n型扩散层的费米能级和作为填充Fe 2+的空位轨道的能级的杂质水平匹配时，共振隧道电流流动。 此后，当非共振状态的状态发生变化时，会出现负电阻特性，其中电流随着电压的增加而减小。 因此，本发明能够提供能够很好地结合到集成电路中的低功率，低电压，快速非线性元件，以及采用这种改进的非线性元件的双稳态存储器件。
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