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17 条记录 (耗时 0.011 秒)

    Semiconductor device and method of manufacturing the same
    2.
    发明公开
    Semiconductor device and method of manufacturing the same 失效
    半导体器件及其制造方法

    公开(公告)号：EP0794573A2

    公开(公告)日：1997-09-10

    申请号：EP97103473.1

    申请日：1997-03-03

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Kawaguchi, Akemi ,  Aoi, Nobuo ,  Kubo, Minoru

    IPC分类号： H01L23/532

    CPC分类号： H01L23/53223 ,  H01L21/76886 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A first insulating film is formed on a semiconductor substrate. A metal wire made of an aluminum alloy containing copper is formed on the first insulating film. An antireflection film is formed on the top face of the metal wire. On the region of the side face of the metal wire uncovered with an aluminum oxide film, there is formed a copper sulfide film, which is a sulfide film of copper. A second insulating film is formed over the metal wire formed with the antireflection film as well as the copper sulfide film and the first insulating film.

    摘要翻译： 第一绝缘膜形成在半导体衬底上。 在第一绝缘膜上形成由含铜的铝合金制成的金属线。 在金属线的顶面上形成抗反射膜。 在未被氧化铝膜覆盖的金属线的侧面区域形成硫化铜膜，该硫化铜膜是铜的硫化物膜。 在形成有抗反射膜的金属布线上以及硫化铜膜和第一绝缘膜上形成第二绝缘膜。

    Heterojunction bipolar transistor
    4.
    发明公开
    Heterojunction bipolar transistor 有权
    Heteroübergangsbipolartransistor

    公开(公告)号：EP1187218A2

    公开(公告)日：2002-03-13

    申请号：EP01121873.2

    申请日：2001-09-11

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Toyoda, Kenji ,  Yuki, Koichiro ,  Takagi, Takeshi ,  Ohnishi, Teruhito ,  Kubo, Minoru

    IPC分类号： H01L29/737 ,  H01L29/10

    CPC分类号： H01L29/7378

    摘要： The bipolar transistor of the present invention includes a Si collector buried layer, a first base region made of a SiGeC layer having a high C content, a second base region made of a SiGeC layer having a low C content or a SiGe layer, and a Si cap layer 14 including an emitter region. The C content is less than 0.8% in at least the emitter-side boundary portion of the second base region. This suppresses formation of recombination centers due to a high C content in a depletion layer at the emitter-base junction, and improves electric characteristics such as the gain thanks to reduction in recombination current, while low-voltage driving is maintained.

    摘要翻译： 本发明的双极晶体管包括Si集电极掩埋层，由具有高C含量的SiGeC层制成的第一基极区域，具有低C含量的SiGeC层或SiGe层制成的第二基极区域，以及 Si覆盖层14包括发射极区域。 至少在第二基极区域的发射极侧边界部分中，C含量小于0.8％。 这抑制了由于在发射极 - 基极结处的耗尽层中的高C含量导致的复合中心的形成，并且由于复合电流的减少而改善了诸如增益的电特性，同时保持了低电压驱动。

    Field-effect transistor and method of producing the same
    6.
    发明公开
    Field-effect transistor and method of producing the same 失效
    Feldeffekttransistor和Verfahren zu dessen Herstellung

    公开(公告)号：EP0829908A3

    公开(公告)日：1998-12-09

    申请号：EP97116183.1

    申请日：1997-09-17

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Kubo, Minoru ,  Nozawa, Katsuya ,  Suzuki, Masakatsu ,  Uenoyama, Takeshi ,  Kumabuchi, Yasuhito

    IPC分类号： H01L29/778 ,  H01L27/092 ,  H01L21/336 ,  H01L21/82

    CPC分类号： H01L29/66431 ,  H01L21/8238 ,  H01L21/823807 ,  H01L27/092 ,  H01L29/1029 ,  H01L29/161 ,  H01L29/7782

    摘要： Si and SiGeC layers are formed in an NMOS transistor on a Si substrate. A carrier accumulation layer is formed with the use of a discontinuous portion of a conduction band present at the heterointerface between the SiGeC and Si layers. Electrons travel in this carrier accumulation layer serving as a channel. In the SiGeC layer, the electron mobility is greater than in silicon, thus increasing the NMOS transistor in operational speed. In a PMOS transistor, a channel in which positive holes travel, is formed with the use of a discontinuous portion of a valence band at the interface between the SiGe and Si layers. In the SiGe layer, too, the positive hole mobility is greater than in the Si layer, thus increasing the PMOS transistor in operational speed. There can be provided a semiconductor device having field-effect transistors having channels lessened in crystal defect.

    摘要翻译： Si和SiGeC层形成在Si衬底上的NMOS晶体管中。 使用存在于SiGeC和Si层之间的异质界面处的导带的不连续部分来形成载流子积累层。 电子在作为通道的载流子累积层中行进。 在SiGeC层中，电子迁移率大于硅中的电子迁移率，从而增加NMOS晶体管的工作速度。 在PMOS晶体管中，通过在SiGe和Si层之间的界面处使用价带的不连续部分来形成正空穴行进的沟道。 在SiGe层中，空穴迁移率也大于Si层，因此增加PMOS晶体管的工作速度。 可以提供具有场效应晶体管的半导体器件，其具有晶体缺陷中的沟道减少。

    Field-effect transistor and method of producing the same
    7.
    发明公开
    Field-effect transistor and method of producing the same 失效
    场效应晶体管及其制造方法

    公开(公告)号：EP0829908A2

    公开(公告)日：1998-03-18

    申请号：EP97116183.1

    申请日：1997-09-17

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Kubo, Minoru ,  Nozawa, Katsuya ,  Suzuki, Masakatsu ,  Uenoyama, Takeshi ,  Kumabuchi, Yasuhito

    IPC分类号： H01L29/778 ,  H01L27/092 ,  H01L21/336 ,  H01L21/82

    CPC分类号： H01L29/66431 ,  H01L21/8238 ,  H01L21/823807 ,  H01L27/092 ,  H01L29/1029 ,  H01L29/161 ,  H01L29/7782

    摘要： Si and SiGeC layers are formed in an NMOS transistor on a Si substrate. A carrier accumulation layer is formed with the use of a discontinuous portion of a conduction band present at the heterointerface between the SiGeC and Si layers. Electrons travel in this carrier accumulation layer serving as a channel. In the SiGeC layer, the electron mobility is greater than in silicon, thus increasing the NMOS transistor in operational speed. In a PMOS transistor, a channel in which positive holes travel, is formed with the use of a discontinuous portion of a valence band at the interface between the SiGe and Si layers. In the SiGe layer, too, the positive hole mobility is greater than in the Si layer, thus increasing the PMOS transistor in operational speed. There can be provided a semiconductor device having field-effect transistors having channels lessened in crystal defect.

    摘要翻译： Si和SiGeC层形成在Si衬底上的NMOS晶体管中。 使用存在于SiGeC和Si层之间的异质界面处的导带的不连续部分形成载流子积累层。 电子在用作通道的该载流子累积层中行进。 在SiGeC层中，电子迁移率大于硅中的电子迁移率，从而增加了NMOS晶体管的工作速度。 在PMOS晶体管中，在SiGe层和Si层之间的界面处使用价带的不连续部分形成正空穴传播的沟道。 在SiGe层中，空穴迁移率也高于Si层，从而增加了PMOS晶体管的工作速度。 可以提供具有晶体缺陷减少的沟道的场效应晶体管的半导体器件。

    Lateral heterojunction bipolar transistor and method of fabricating the same
    9.
    发明公开
    Lateral heterojunction bipolar transistor and method of fabricating the same 审中-公开
    横型异质结晶体管及其制造方法

    公开(公告)号：EP1094523A3

    公开(公告)日：2003-06-11

    申请号：EP00122896.4

    申请日：2000-10-20

    申请人： Matsushita Electric Industrial Co., Ltd.

    发明人： Yuki, Koichiro ,  Kubo, Minoru

    IPC分类号： H01L29/737 ,  H01L21/331

    CPC分类号： H01L29/66242 ,  H01L29/737

    摘要： A lateral heterojunction bipolar transistor comprises a first semiconductor layer in a mesa configuration disposed on an insulating layer, a second semiconductor layer formed by epitaxial growth on the side surfaces of the first semiconductor layer and having a band gap different from that of the first semiconductor layer, and a third semiconductor layer formed by epitaxial growth on the side surfaces of the second semiconductor layer and having a band gap different from that of the second semiconductor layer. The first semiconductor layer serves as a collector (101) of a first conductivity type. At least a part of the second semiconductor layer (102) serves as an internal base layer (102a) of a second conductivity type. At least a part of the third semiconductor layer (103) serves as an emitter operating region of the first conductivity type. The diffusion of an impurity is suppressed in the internal base formed by epitaxial growth.