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公开(公告)号：EP1187218A2
公开(公告)日：2002-03-13
申请号：EP01121873.2
申请日：2001-09-11
IPC分类号： H01L29/737 , H01L29/10
CPC分类号： H01L29/7378
摘要： The bipolar transistor of the present invention includes a Si collector buried layer, a first base region made of a SiGeC layer having a high C content, a second base region made of a SiGeC layer having a low C content or a SiGe layer, and a Si cap layer 14 including an emitter region. The C content is less than 0.8% in at least the emitter-side boundary portion of the second base region. This suppresses formation of recombination centers due to a high C content in a depletion layer at the emitter-base junction, and improves electric characteristics such as the gain thanks to reduction in recombination current, while low-voltage driving is maintained.
摘要翻译： 本发明的双极晶体管包括Si集电极掩埋层，由具有高C含量的SiGeC层制成的第一基极区域，具有低C含量的SiGeC层或SiGe层制成的第二基极区域，以及 Si覆盖层14包括发射极区域。 至少在第二基极区域的发射极侧边界部分中，C含量小于0.8％。 这抑制了由于在发射极 - 基极结处的耗尽层中的高C含量导致的复合中心的形成，并且由于复合电流的减少而改善了诸如增益的电特性，同时保持了低电压驱动。
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公开(公告)号：EP0577137B1
公开(公告)日：1996-09-11
申请号：EP93110609.0
申请日：1993-07-02
发明人： Okada, Kenji , Morimoto, Kiyoshi , Udagawa, Masaharu , Yuki, Koichiro , Niwa, Masaaki , Hirai, Yoshihiko , Yasui, Juro
IPC分类号： H01L21/334
CPC分类号： B82Y10/00 , B82Y30/00 , H01L29/1037 , H01L29/66931 , H01L29/772 , H01L29/882 , Y10S438/911 , Y10S438/962
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公开(公告)号：EP1187218A3
公开(公告)日：2003-02-12
申请号：EP01121873.2
申请日：2001-09-11
IPC分类号： H01L29/737 , H01L29/10
CPC分类号： H01L29/7378
摘要： The bipolar transistor of the present invention includes a Si collector buried layer, a first base region made of a SiGeC layer having a high C content, a second base region made of a SiGeC layer having a low C content or a SiGe layer, and a Si cap layer 14 including an emitter region. The C content is less than 0.8% in at least the emitter-side boundary portion of the second base region. This suppresses formation of recombination centers due to a high C content in a depletion layer at the emitter-base junction, and improves electric characteristics such as the gain thanks to reduction in recombination current, while low-voltage driving is maintained.
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4.发明公开Lateral heterojunction bipolar transistor and method of fabricating the same 审中-公开左派Heteroübergangstransistor和Verfahren zur Herstellung
公开(公告)号：EP1094523A2
公开(公告)日：2001-04-25
申请号：EP00122896.4
申请日：2000-10-20
发明人： Yuki, Koichiro , Kubo, Minoru
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/66242 , H01L29/737
摘要： A lateral heterojunction bipolar transistor comprises a first semiconductor layer in a mesa configuration disposed on an insulating layer, a second semiconductor layer formed by epitaxial growth on the side surfaces of the first semiconductor layer and having a band gap different from that of the first semiconductor layer, and a third semiconductor layer formed by epitaxial growth on the side surfaces of the second semiconductor layer and having a band gap different from that of the second semiconductor layer. The first semiconductor layer serves as a collector of a first conductivity type. At least a part of the second semiconductor layer serves as an internal base layer of a second conductivity type. At least a part of the third semiconductor layer serves as an emitter operating region of the first conductivity type. The diffusion of an impurity is suppressed in the internal base formed by epitaxial growth.
摘要翻译： 横向异质结双极晶体管包括设置在绝缘层上的台面结构中的第一半导体层，通过外延生长形成在第一半导体层的侧表面上并且具有与第一半导体层的带隙不同的带隙的第二半导体层 以及通过外延生长形成在第二半导体层的侧表面上并具有与第二半导体层的带隙不同的带隙的第三半导体层。 第一半导体层用作第一导电类型的集电体。 第二半导体层的至少一部分用作第二导电类型的内部基极层。 第三半导体层的至少一部分用作第一导电类型的发射极工作区域。 在通过外延生长形成的内部基底中抑制杂质的扩散。
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公开(公告)号：EP0598230A3
公开(公告)日：1994-08-17
申请号：EP93116812.4
申请日：1993-10-18
发明人： Udagawa, Masaharu , Yasui, Juro , Niwa, Massaaki , Hirai, Yoshihiko , Okada, Kenji , Moimoto, Kiyoshi , Yuki, Koichiro
IPC分类号： H01L21/306
CPC分类号： H01L21/02046
摘要： For removing an unnecessary substance on a silicon substrate surface, a temperature of the unnecessary substance on the silicon substrate surface is not less than 750°C when the unnecessary substance is exposed to a gas including ozone.
摘要翻译： 为了除去硅衬底表面上的不需要的物质，当不需要的物质暴露于包括臭氧的气体时，硅衬底表面上的不必要物质的温度不低于750℃。
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6.发明公开Method for fabricating a bipolar transistor and a MISFET semiconductor device 有权Herstellungsverfahrenfüreinen双极晶体管和MISFET Halbleiter Bauelement
公开(公告)号：EP1710842A1
公开(公告)日：2006-10-11
申请号：EP06012402.1
申请日：2000-03-14
发明人： Asai, Akira , Oonishi, Teruhito , Takagi, Takeshi , Saitho, Tohru , Hara, Yoshihiro , Yuki, Koichiro , Nozawa, Katsuya , Kanzawa, Yoshihiko , Katayama, Koji , Ichikawa, Yo
IPC分类号： H01L29/737 , H01L21/331 , H01L27/06 , H01L21/8249
CPC分类号： H01L29/66242 , H01L21/763 , H01L21/8249 , H01L27/0623 , H01L29/7378
摘要： In the method for fabricating a semiconductor device of the present invention, a collector layer of a first conductivity type is formed in a region of a semiconductor substrate sandwiched by device isolation. A collector opening is formed through a first insulating layer deposited on the semiconductor substrate so that the range of the collector opening covers the collector layer and part of the device isolation. A semiconductor layer of a second conductivity type as an external base is formed on a portion of the semiconductor substrate located inside the collector opening, while junction leak prevention layers of the same conductivity type as the external base are formed in the semiconductor substrate. Thus, the active region is narrower than the collector opening reducing the transistor area, while minimizing junction leak.
摘要翻译： 在本发明的半导体装置的制造方法中，在被器件分离夹持的半导体基板的区域中形成有第一导电型的集电极。 通过沉积在半导体衬底上的第一绝缘层形成集电极开口，使得集电器开口的范围覆盖集电极层和器件隔离的一部分。 在位于集电体开口内部的半导体衬底的一部分上形成作为外部基底的第二导电类型的半导体层，而在半导体衬底中形成与外部基底相同的导电类型的接点防漏层。 因此，有源区域比集电极开口窄，减小晶体管面积，同时最小化结漏电。
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公开(公告)号：EP1406309A1
公开(公告)日：2004-04-07
申请号：EP03022574.2
申请日：2003-10-02
发明人： Ohnishi, Teruhito , Yuki, Koichiro , Sawsada, Shigeki , Shimizu, Keiichiro , Hasegawa, Koichi , Saitho, Tohru , Clifton, Paul A.
IPC分类号： H01L29/737 , H01L29/10 , H01L29/161
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/7378
摘要： In a semiconductor device acting as an HBT, an emitter/base laminate portion is provided on a Si epitaxially grown layer in the SiGeC-HBT. The emitter/base laminate portion includes a SiGeC spacer layer, a SiGeC core base layer containing the boron, a Si cap layer, and an emitter layer formed by introducing phosphorous into the Si cap layer. The C content of the SiGeC spacer layer is equal to or lower than that of the SiGeC core base layer.
摘要翻译： 半导体器件包括：（a）用作集电极层的硅层; 和（b）形成在硅层上并用作发射极层和作为基底层的半导体层。 半导体层包括芯基层和形成在芯基层下并与芯基层接触的间隔层。 半导体器件包括用作集电极层（6）的硅层（2）; 以及形成在硅层上并用作发射极层（25）和作为基极层（11）的半导体层。 半导体层包括芯基层（22）和形成在芯基层下并与芯基层接触的间隔层（21）。 核心基层具有以下表达的组成：Si1-x1-y1Gex1Cy1。 间隔层具有由Si1-x2-y2Gex2Cy2表示的组成。 x1：大于0且小于1; y1：> = 0.003且小于1; x2：大于0且小于1; y2：> = 0且小于或等于y1。
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8.发明公开Heterojunction bipolar transistor and method for fabricating the same 有权Heteroübergangsbipolartransistorenund entsprechende Herstellungsverfahren
公开(公告)号：EP1065728A2
公开(公告)日：2001-01-03
申请号：EP00113276.0
申请日：2000-06-21
IPC分类号： H01L29/737 , H01L29/161 , H01L29/165 , H01L21/331
CPC分类号： H01L29/7378 , H01L29/161 , H01L29/66242
摘要： A heterojunction bipolar transistor comprises Si collector layer (3b), a SiGeC base layer (8a) and a Si emitter layer (9) stacked in this order. By making the amount of a lattice strain in the SiGeC base layer on the Si collector layer 1.0% or less, the band gap of the SiGeC base layer can be narrower than the band gap of the conventional SiGe base layer having a Ge content of about 10%, and good crystal quality can be maintained after a heat treatment.
摘要翻译： 异质结双极晶体管包括依次堆叠的Si集电极层（3b），SiGeC基极层（8a）和Si发射极层（9）。 通过使Si集电体层的SiGeC基底层中的晶格应变量为1.0％以下，SiGeC基极层的带隙可以窄于具有Ge含量为约的常规SiGe基底层的带隙 10％，并且在热处理后可以保持良好的晶体质量。
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公开(公告)号：EP0709895A2
公开(公告)日：1996-05-01
申请号：EP95119854.8
申请日：1993-07-02
发明人： Okada, Kenji , Morimoto, Kiyoshi , Udagawa, Masaharu , Yuki, Koichiro , Niwa, Masaaki , Hirai, Yoshihiko , Yasui, Juro
CPC分类号： B82Y10/00 , B82Y30/00 , H01L29/1037 , H01L29/66931 , H01L29/772 , H01L29/882 , Y10S438/911 , Y10S438/962
摘要： A quantum effect device including a plate-like conductor part having a necking portion is disclosed. Such a quantum device comprises: a conductor substrate having a main face; and a plate-like conductor part having two side faces, said side faces being perpendicular to said main face of said conductor substrate, said side faces being parallel to each other, wherein said plate-like conductor part includes a necking portion having a width smaller than a distance between said two side faces, and energy states of electrons in said necking portion are quantized in a direction perpendicular to said two side faces.
摘要翻译： 公开了一种包括具有颈缩部分的板状导体部分的量子效应器件。 这种量子器件包括：具有主面的导体衬底; 以及具有两个侧面的板状导体部，所述侧面与所述导体基板的所述主面垂直，所述侧面相互平行，其特征在于，所述板状导体部包括宽度较小的颈缩部 比所述两个侧面之间的距离，并且所述颈缩部分中的电子的能量状态在垂直于所述两个侧面的方向上量化。
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10.发明公开Heterojunction bipolar transistor and method for fabricating the same 审中-公开Heteroübergangsbipolartransistor和Verfahren zu dessen Herstellung
公开(公告)号：EP1965431A2
公开(公告)日：2008-09-03
申请号：EP08011439.0
申请日：2000-06-21
IPC分类号： H01L29/737 , H01L29/161 , H01L29/165 , H01L21/331
CPC分类号： H01L29/7378 , H01L29/161 , H01L29/66242
摘要： A heterojunction bipolar transistor is fabricated by stacking a Si collector layer, a SiGeC base layer and a Si emitter layer in this order. By making the amount of a lattice strain in the SiGeC base layer on the Si collector layer 1.0% or less, the band gap can be narrower than the band gap of the conventional practical SiGe (the Ge content is about 10%), and good crystalline can be maintained after a heat treatment. As a result, a narrow band gap base with no practical inconvenience can be realized.
摘要翻译： 通过依次堆叠Si集电极层，SiGeC基极层和Si发射极层来制造异质结双极晶体管。 通过使Si集电体层的SiGeC基底层中的晶格应变量为1.0％以下，带隙可以窄于传统的实际SiGe（Ge含量为约10％）的带隙，并且良好 结晶可在热处理后保持。 结果，可以实现不具有实际不便的窄带隙基。
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