公开(公告)号：EP3218903A4

公开(公告)日：2018-07-18

申请号：EP15858290

申请日：2015-11-09

申请人： MICRON TECHNOLOGY INC

发明人： WILSON ALAN J ,  WRIGHT JEFFREY P

IPC分类号： G11C29/02 ,  G11C5/06 ,  G11C7/20 ,  G11C7/22 ,  G11C11/4072 ,  G11C11/4076 ,  G11C11/4093 ,  G11C16/06 ,  G11C16/20 ,  G11C17/18 ,  G11C29/00 ,  G11C29/14 ,  G11C29/46

CPC分类号： G11C7/20 ,  G11C5/063 ,  G11C7/22 ,  G11C11/4072 ,  G11C11/4076 ,  G11C11/4093 ,  G11C16/06 ,  G11C16/20 ,  G11C17/18 ,  G11C29/021 ,  G11C29/022 ,  G11C29/023 ,  G11C29/028 ,  G11C29/14 ,  G11C29/46 ,  G11C29/70

摘要： Memory die can be stacked to form a three-dimensional integrated circuit. For example, through-silicon vias (TSVs) can permit signals to pass vertically through the three-dimensional integrated circuit. Disclosed herein are apparatuses and methods to perform post package trimming of memory die, which advantageously permits the memory die to be trimmed after the memory die is stacked, such that test and trimming characteristics are relatively close to that which will be actually be encountered.

公开(公告)号：EP3129987A4

公开(公告)日：2018-04-25

申请号：EP15777541

申请日：2015-02-11

申请人： MICRON TECHNOLOGY INC

发明人： WILSON ALAN J ,  WRIGHT JEFFREY

IPC分类号： G11C29/00 ,  G11C7/24 ,  G11C29/44

CPC分类号： G11C29/76 ,  G11C7/24 ,  G11C11/408 ,  G11C11/4087 ,  G11C11/418 ,  G11C17/16 ,  G11C17/18 ,  G11C29/04 ,  G11C29/70 ,  G11C29/789 ,  G11C29/806 ,  G11C29/838 ,  G11C2029/4402

摘要： Apparatus and methods for soft post package repair are disclosed. One such apparatus can include memory cells in a package, volatile memory configured to store defective address data responsive to entering a soft post-package repair mode, a match logic circuit and a decoder. The match logic circuit can generate a match signal indicating whether address data corresponding to an address to be accessed matches the detective address data stored in the volatile memory. The decoder can select a first group of the memory cells to be accessed instead of a second group of the memory cells responsive to the match signal indicating that the address data corresponding to the address to be accessed matches the defective address data stored in the volatile memory. The second group of the memory cells can correspond to a replacement address associated with other defective address data stored in non-volatile memory of the apparatus.