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公开(公告)号:EP2889907A3
公开(公告)日:2015-10-07
申请号:EP14199621.5
申请日:2014-12-22
申请人: MediaTek, Inc
发明人: Chung, Yuan-Fu , Hu, Chu-Wei , Chung, Yuan-Hung
IPC分类号: H01L27/06 , H01L21/265 , H01L49/02 , H01L21/268 , H01L21/324 , H01L27/02
CPC分类号: H01L28/20 , H01L21/02532 , H01L21/02595 , H01L21/265 , H01L21/26506 , H01L21/26513 , H01L21/266 , H01L21/268 , H01L21/28035 , H01L21/32155 , H01L21/324 , H01L21/76224 , H01L21/8234 , H01L21/823437 , H01L27/0207 , H01L27/0629 , H01L29/0649 , H01L29/0653 , H01L29/167 , H01L29/4916
摘要: An integrated circuit includes a first polysilicon region (105) having a first grain size (GS2) formed on a substrate (101). The integrated circuit also includes a second polysilicon region (151), having a second grain size (GS1) different from the first grain size, formed on the substrate. Furthermore, a method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region (105) having an initial grain size (GS1) on a substrate. The first polysilicon region is implanted with a first dopant of a first conductivity type and a second dopant. After the implantation, the first polysilicon region has a first grain size (GS2) larger than the initial grain size. Then, a laser rapid thermal annealing process is performed to the first polysilicon region.
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公开(公告)号:EP2889907A2
公开(公告)日:2015-07-01
申请号:EP14199621.5
申请日:2014-12-22
申请人: MediaTek, Inc
发明人: Chung, Yuan-Fu , Hu, Chu-Wei , Chung, Yuan-Hung
IPC分类号: H01L27/06 , H01L21/265 , H01L27/02
CPC分类号: H01L28/20 , H01L21/02532 , H01L21/02595 , H01L21/265 , H01L21/26506 , H01L21/26513 , H01L21/266 , H01L21/268 , H01L21/28035 , H01L21/32155 , H01L21/324 , H01L21/76224 , H01L21/8234 , H01L21/823437 , H01L27/0207 , H01L27/0629 , H01L29/0649 , H01L29/0653 , H01L29/167 , H01L29/4916
摘要: An integrated circuit includes a first polysilicon region (105) having a first grain size (GS2) formed on a substrate (101). The integrated circuit also includes a second polysilicon region (151), having a second grain size (GS1) different from the first grain size, formed on the substrate. Furthermore, a method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region (105) having an initial grain size (GS1) on a substrate. The first polysilicon region is implanted with a first dopant of a first conductivity type and a second dopant. After the implantation, the first polysilicon region has a first grain size (GS2) larger than the initial grain size. Then, a laser rapid thermal annealing process is performed to the first polysilicon region.
摘要翻译: 集成电路包括形成在衬底(101)上的具有第一晶粒尺寸(GS2)的第一多晶硅区域(105)。 集成电路还包括形成在衬底上的具有不同于第一晶粒尺寸的第二晶粒尺寸(GS1)的第二多晶硅区域(151)。 此外,还提供了一种制造集成电路的方法。 该方法包括在衬底上形成具有初始晶粒尺寸(GS1)的第一多晶硅区域(105)。 第一多晶硅区域注入有第一导电类型的第一掺杂剂和第二掺杂剂。 植入后,第一多晶硅区域具有比初始晶粒尺寸更大的第一晶粒尺寸(GS2)。 然后,对第一多晶硅区域执行激光快速热退火处理。
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公开(公告)号:EP3089366A1
公开(公告)日:2016-11-02
申请号:EP15190380.4
申请日:2015-10-19
申请人: MediaTek, Inc
发明人: Chung, Yuan-Hung , Hsu, Ming-Yeh
CPC分类号: H03H11/0461 , H03F3/45273 , H03F2200/91 , H03H11/0405 , H03H11/0416 , H03H11/0466 , H03H11/1213 , H03H2011/0411
摘要: A frequency selective circuit includes a first transistor, an impedance element, a first capacitive element, a second capacitive element, a second capacitive and a second transistor. The first transistor includes a first terminal, a second terminal and a control terminal. The impedance element is coupled between the first terminal and the control terminal of the first transistor. The first capacitive element is coupled to the first terminal of the first transistor. The second capacitive element is coupled to the control terminal of the first transistor. The second transistor includes a first terminal, a second terminal and a control terminal, wherein the control terminal of the second transistor is coupled to the control terminal of the first transistor.
摘要翻译: 频率选择电路包括第一晶体管,阻抗元件,第一电容元件,第二电容元件,第二电容和第二晶体管。 第一晶体管包括第一端子,第二端子和控制端子。 阻抗元件耦合在第一晶体管的第一端子和控制端子之间。 第一电容元件耦合到第一晶体管的第一端子。 第二电容元件耦合到第一晶体管的控制端子。 第二晶体管包括第一端子,第二端子和控制端子,其中第二晶体管的控制端子耦合到第一晶体管的控制端子。
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