PHOTORECEPTOR USING MACH-ZEHNDER INTERFEROMETER
    1.
    发明公开
    PHOTORECEPTOR USING MACH-ZEHNDER INTERFEROMETER 有权
    使用MACH-ZEHNDER干涉仪的光电传感器

    公开(公告)号:EP1953931A1

    公开(公告)日:2008-08-06

    申请号:EP06756401.3

    申请日:2006-05-19

    摘要: The present invention relates to an optical receiver, in which the transmittance of a Mach-Zehnder interferometer can be locked at a normal operation point in a simple structure and control.
    A transmittance detecting circuit and a minute modulation signal detecting circuit are provided in parallel after a balanced optical receiver, and a switch is selectively connectable either a minute modulation signal detecting circuit and a transmittance detecting circuit. In the initial stage of frequency pull-in, the switch is set to connect the transmittance detecting circuit to the synchronous detection circuit. If the transmittance detecting circuit detects that the transmittance of the Mach-Zehnder interferometer at the carrier frequency becomes a desired transmittance, the connection of the switch is switched from the transmittance detecting circuit to the minute modulation signal detecting circuit.

    摘要翻译: 本发明涉及一种光学接收器,其中Mach-Zehnder干涉仪的透射率可以在简单的结构和控制下被锁定在正常操作点。 在平衡式光接收器之后并联地提供透射率检测电路和微小调制信号检测电路,并且开关可选择性地连接微小调制信号检测电路和透射率检测电路。 在频率引入的初始阶段,开关设置为将透射率检测电路连接到同步检测电路。 如果透射率检测电路检测到在载波频率处Mach-Zehnder干涉仪的透射率变成期望的透射率,则开关的连接从透射率检测电路切换到微小调制信号检测电路。

    PHASE-LOCKED LOOP
    2.
    发明公开
    PHASE-LOCKED LOOP 有权
    PHASENREGELSCHLEIFE

    公开(公告)号:EP1184987A1

    公开(公告)日:2002-03-06

    申请号:EP01915659.5

    申请日:2001-03-21

    IPC分类号: H03L7/10

    CPC分类号: H03L7/10 H03L7/087

    摘要: A phase lock circuit has a signal path to which a phase comparator, a loop filter and a voltage control oscillator are connected in series, the phase comparator being adapted to compare the phase of an input signal V IN with the phase in the output signal of the voltage control oscillator and to output its result of comparison, the loop filter being adapted to receive the output signal of the phase comparator and to output a DC voltage; the voltage control oscillator being adapted to control the output oscillation frequency depending on the DC output voltage of the loop filter, the phase lock circuit further comprising voltage tracking means for adding, to the voltage of the signal path, a signal causing the average voltage in the output voltage of the phase comparator to coincide with a predetermined reference voltage, whereby the voltage tracking means can enlarge the lock range in the phase lock circuit.

    摘要翻译: 锁相电路具有相位比较器,环路滤波器和压控振荡器串联连接的信号路径,相位比较器适于将输入信号VIN的相位与输入信号VIN的输出信号中的相位进行比较 电压控制振荡器,并输出比较结果,环路滤波器适于接收相位比较器的输出信号并输出​​直流电压; 所述电压控制振荡器适于根据所述环路滤波器的直流输出电压来控制所述输出振荡频率,所述锁相电路还包括电压跟踪装置,用于将所述信号路径的电压加到所述信号路径的电压中, 相位比较器的输出电压与预定的参考电压一致,由此电压跟踪装置可以扩大锁相电路中的锁定范围。

    PHASE-LOCKED LOOP
    5.
    发明授权
    PHASE-LOCKED LOOP 有权
    锁相环路

    公开(公告)号:EP1184987B1

    公开(公告)日:2006-06-14

    申请号:EP01915659.5

    申请日:2001-03-21

    IPC分类号: H03L7/10

    CPC分类号: H03L7/10 H03L7/087

    摘要: A phase-locked loop comprises a signal path including a phase comparator, a loop filter and a voltage-controlled oscillator that are cascaded. The phase comparator compares the phases of an input signal with the phase of the output signal from the voltage-controlled oscillator and produces the result of comparison. The loop filter produces DC voltage in response to the output signal from the phase comparator. The voltage-controlled oscillator controls output oscillation frequency according to the DC output voltage from the loop filter. Voltage tracking means combines the voltage of the signal path with a signal for making the average voltage output from the phase comparator equal to a predetermined reference voltage. The voltage tracking means serves to expand the lock range of the phase-locked loop.

    摘要翻译: 锁相环包括级联的包括相位比较器,环路滤波器和压控振荡器的信号路径。 相位比较器将输入信号的相位与来自压控振荡器的输出信号的相位进行比较,并产生比较结果。 环路滤波器响应来自相位比较器的输出信号产生DC电压。 压控振荡器根据环路滤波器的直流输出电压控制输出振荡频率。 电压跟踪装置将信号路径的电压与用于使从相位比较器输出的平均电压等于预定参考电压的信号组合。 电压跟踪装置用于扩展锁相环的锁定范围。