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公开(公告)号：EP1668647A1
公开(公告)日：2006-06-14
申请号：EP03818777.9
申请日：2003-09-29
申请人： Nokia Corporation
CPC分类号： G11C27/026 , G11C27/028 , H03G1/0094 , H03H19/004
摘要： The invention relates to an active current mode sampling circuit comprising an operational amplifier (103) and at least one switched capacitor (C2, C2a, C2b). In order to reduce the power consumption of such a circuit, first switching elements (S101a, S101b, S102a, S102b) switch the switched capacitor (C2, C2a, C2b) between an input and an output of the operational amplifier (103) during charging phases φ1. Further, second switching elements (S103a, S103b, S104a, S104b) connect the switched capacitor (C2, C2a, C2b) during discharging phases φ2 to a subsequent stage (104), in order to provide a charge of the switched capacitor (C2, C2a, C2b) to the subsequent stage (104). The invention relates equally to a device (107) comprising such a sampling circuit and to a method of operating such a sampling circuit.
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公开(公告)号：EP1726089A1
公开(公告)日：2006-11-29
申请号：EP04704299.9
申请日：2004-01-22
申请人： Nokia Corporation
IPC分类号： H03D7/14
CPC分类号： H03D7/14
摘要： The invention relates to a mixer circuit 31 comprising a down-conversion mixing component 33 arranged for down-converting an input radio frequency signal Irf+, Irf-. In order to improve such a mixer circuit, it is proposed that it comprises in addition an active mixer load circuit 34 connected to output terminals of the mixing component. The active mixer load circuit includes an active mixer load 51, T1, T2 and modulating means S1-S4 arranged for modulating a flicker noise produced by the active mixer load away from the signal band of a signal Ibb+, Ibb- output by the down-conversion mixing component. The invention relates equally to a receiver, a chip and a device comprising such a mixer circuit and to a method for use with such a mixer circuit.
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3.发明公开A MULTI-LEVEL QUANTIZER WITH CURRENT MODE DEM SWITCH MATRICES AND SEPARATE DEM DECISION LOGIC FOR A MULTIBIT SIGMA DELTA MODULATOR 有权WITH MEHRPEGELQUANTISIERER功耗模式-THE-开关矩阵和独立的决策逻辑用于多Σ-Δ调制
公开(公告)号：EP1400017A2
公开(公告)日：2004-03-24
申请号：EP02735826.6
申请日：2002-06-12
申请人： Nokia Corporation
IPC分类号： H03K3/00
摘要： A multilevel quantizer (14) is provided in combination with dynamic element matching DEM (20) circuitry in a multibit sigma-delta modulator (10). The DEM circuitry is implemented in a divided manner as two major component parts: at least one current mode DEM switch matrix (20B)(SM), and an associated DEM decision logic block that implements the DEM control algorithm (20A) and that controls the SM. The DEM decision logic block is removed from the delay sensitive sigma-delta feedback loop, while the DEM SM remains within the feedback loop. Also described is a convenient and efficient technique to implement the DEM SM, using current steering logic within the multibit quantizer. In this case one or more DEM switching matrices may be provided within the quantizer for reordering the N-1 digital output bits of the N-level quantizer.
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4.发明授权A MULTI-LEVEL QUANTIZER WITH CURRENT MODE DEM SWITCH MATRICES AND SEPARATE DEM DECISION LOGIC FOR A MULTIBIT SIGMA DELTA MODULATOR 有权WITH MEHRPEGELQUANTISIERER功耗模式-THE-开关矩阵和独立的决策逻辑用于多Σ-Δ调制
公开(公告)号：EP1400017B1
公开(公告)日：2011-04-27
申请号：EP02735826.6
申请日：2002-06-12
申请人： Nokia Corporation
摘要： A multilevel quantizer (14) is provided in combination with dynamic element matching DEM (20) circuitry in a multibit sigma-delta modulator (10). The DEM circuitry is implemented in a divided manner as two major component parts: at least one current mode DEM switch matrix (20B)(SM), and an associated DEM decision logic block that implements the DEM control algorithm (20A) and that controls the SM. The DEM decision logic block is removed from the delay sensitive sigma-delta feedback loop, while the DEM SM remains within the feedback loop. Also described is a convenient and efficient technique to implement the DEM SM, using current steering logic within the multibit quantizer. In this case one or more DEM switching matrices may be provided within the quantizer for reordering the N-1 digital output bits of the N-level quantizer.
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公开(公告)号：EP1726089B1
公开(公告)日：2010-09-22
申请号：EP04704299.9
申请日：2004-01-22
申请人： Nokia Corporation
IPC分类号： H03D7/14
CPC分类号： H03D7/14
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公开(公告)号：EP1668647B1
公开(公告)日：2009-09-16
申请号：EP03818777.9
申请日：2003-09-29
申请人： Nokia Corporation
CPC分类号： G11C27/026 , G11C27/028 , H03G1/0094 , H03H19/004
摘要： The invention relates to an active current mode sampling circuit comprising an operational amplifier (103) and at least one switched capacitor (C2, C2a, C2b). In order to reduce the power consumption of such a circuit, first switching elements (S101a, S101b, S102a, S102b) switch the switched capacitor (C2, C2a, C2b) between an input and an output of the operational amplifier (103) during charging phases phi1. Further, second switching elements (S103a, S103b, S104a, S104b) connect the switched capacitor (C2, C2a, C2b) during discharging phases phi2 to a subsequent stage (104), in order to provide a charge of the switched capacitor (C2, C2a, C2b) to the subsequent stage (104). The invention relates equally to a device (107) comprising such a sampling circuit and to a method of operating such a sampling circuit.
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7.发明授权MULTIMODE I/O CIRCUITRY SUPPORTING LOW INTERFERENCE SIGNALING SCHEMES FOR HIGH SPEED DIGITAL INTERFACES 有权更符合-I / O电路，问题较差的信号格式新快速数字接口支持
公开(公告)号：EP1446883B1
公开(公告)日：2012-04-04
申请号：EP02802339.8
申请日：2002-10-17
申请人： Nokia Corporation
IPC分类号： H03K19/094 , H03K19/173 , H03K19/177 , H04L25/02 , H03K19/0185
CPC分类号： H04L25/0272 , H01L2224/48091 , H01L2224/49175 , H01L2924/13091 , H01L2924/30107 , H01L2924/3011 , H04L25/0264 , H04L25/0282 , H04L25/0294 , H04L25/45 , H01L2924/00014 , H01L2924/00
摘要： A multi-mode I/0 circuit or cell (10) is provided for transmitting and receiving data between ICs, where each IC contains at least one of the I/0 circuits. Each data link includes transmitter circuitry (12) and receiver circuitry (14). The transmitter circuitry sends data to a receiver circuitry in another IC, and the receiver circuitry receives data from a transmitter circuitry in another IC.
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8.发明公开LOW CAPACITANCE, LOW KICKBACK NOISE INPUT STAGE OF A MULTI-LEVEL QUANTIZER WITH DITHERING AND MULTI-THRESHOLD GENERATION FOR A MULTI-BIT SIGMA-DELTA MODULATOR 审中-公开具有低容量和MEHRPEGELQUANTISIERERS抖动多条生产门槛多SIGMA-DELTA调制器的噪声低踢回输入级
公开(公告)号：EP1479169A2
公开(公告)日：2004-11-24
申请号：EP02740979.6
申请日：2002-06-19
申请人： Nokia Corporation
IPC分类号： H03M3/00
摘要： An N-level quantizer circuit (14) has an analog input terminal and N-1 digital output terminals, and includes a sampling circuit (SW samp) coupled to the input terminal for providing a sampled input voltage signal; at least one preamplifier stage (14A) for converting the sampled input voltage signal to a current signal and providing an amplified sampled input signal; and N-1 comparator stages (14B) each having an input coupled to an output of the at least one preamplifier stage (14A) and sharing the input current equally. Individual ones of the N-1 comparator stages (14B) operate to compare the amplified sampled signal to an associated one of N-1 reference signals. The quantizer (14) further includes N-1 latches (14C), individual ones of which latch an output state of one of the N-1 comparators and have an output coupled to one of the N-1 digital output terminals of the quantizer circuit (14).
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9.发明公开MULTIMODE CIRCUITRY SUPPORTING LOW INTERFERENCE SIGNALING SCHEMES FOR HIGH SPEED DIGITAL INTERFACES 有权更符合-I / O电路，问题较差的信号格式新快速数字接口支持
公开(公告)号：EP1446883A1
公开(公告)日：2004-08-18
申请号：EP02802339.8
申请日：2002-10-17
申请人： Nokia Corporation
IPC分类号： H03K19/094 , H03K19/173 , H03K19/177
CPC分类号： H04L25/0272 , H01L2224/48091 , H01L2224/49175 , H01L2924/13091 , H01L2924/30107 , H01L2924/3011 , H04L25/0264 , H04L25/0282 , H04L25/0294 , H04L25/45 , H01L2924/00014 , H01L2924/00
摘要： A multi-mode I/0 circuit or cell (10) is provided for transmitting and receiving data between ICs, where each IC contains at least one of the I/0 circuits. Each data link includes transmitter circuitry (12) and receiver circuitry (14). The transmitter circuitry sends data to a receiver circuitry in another IC, and the receiver circuitry receives data from a transmitter circuitry in another IC.
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