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公开(公告)号:EP2457253A1
公开(公告)日:2012-05-30
申请号:EP10737694.9
申请日:2010-07-09
IPC分类号: H01L25/065 , H01L23/00 , H01L23/28
CPC分类号: H01L25/0657 , H01L23/3121 , H01L23/642 , H01L23/645 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/48 , H01L24/72 , H01L24/90 , H01L25/0652 , H01L29/0657 , H01L2223/6638 , H01L2224/13099 , H01L2224/32145 , H01L2224/32225 , H01L2224/48137 , H01L2224/48157 , H01L2225/06527 , H01L2225/06551 , H01L2225/06555 , H01L2225/06562 , H01L2225/06572 , H01L2225/06575 , H01L2225/06589 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01055 , H01L2924/01058 , H01L2924/01067 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19104 , H01L2924/19106 , H01L2924/19107 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A chip package is described. This chip package includes a stack of semiconductor dies or chips that are offset from each other, thereby defining a terrace with exposed pads. A high-bandwidth ramp component, which is positioned approximately parallel to the terrace, electrically couples to the exposed pads. For example, the ramp component may be electrically coupled to the semiconductor dies using: microsprings, an anisotropic film, and/or solder. Consequently, the electrical contacts may have a conductive, a capacitive or, in general, a complex impedance. Furthermore, the chips and/or the ramp component may be positioned relative to each other using a ball-and-pit alignment technique. By removing the need for costly and area-consuming through-silicon vias (TSVs) in the semiconductor dies, the chip package facilitates chips to be stacked in a manner that provides high bandwidth and low cost.
摘要翻译: 描述芯片封装(450)。 该芯片封装包括彼此偏移的半导体管芯(110-1,110-2,110-N)或芯片堆叠,从而限定具有暴露焊盘的露台。 位于大致平行于平台的斜坡部件(112)电耦合到暴露的焊盘。 机械止动件(460-1)形成在半导体管芯上,用于半导体管芯和斜坡部件之间的机械接触。 斜坡部件使用微弹簧(114)电耦合到半导体管芯。 因此,电触点可以具有导电性,电容性或通常的复阻抗。 通过消除对半导体管芯中昂贵且占地面积的硅通孔(TSV)的需求,芯片封装便于以提供高带宽和低成本的方式堆叠芯片。