公开(公告)号：EP2958143B1

公开(公告)日：2017-12-27

申请号：EP15177142.5

申请日：2010-07-09

申请人： Oracle America, Inc. formerly known as Sun Microsystems, Inc.

发明人： DROST, Robert J ,  MITCHELL, James G. ,  DOUGLAS, David C.

IPC分类号： H01L25/065 ,  H01L21/60 ,  H01L23/28

CPC分类号： H01L25/0657 ,  H01L23/3121 ,  H01L23/642 ,  H01L23/645 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/48 ,  H01L24/72 ,  H01L24/90 ,  H01L25/0652 ,  H01L29/0657 ,  H01L2223/6638 ,  H01L2224/13099 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48137 ,  H01L2224/48157 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/01058 ,  H01L2924/01067 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2924/19106 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package is described (450). This chip package includes a stack of semiconductor dies (110-1,110-2,110-N) or chips that are offset from each other, thereby defining a terrace with exposed pads. A ramp component (112), which is positioned approximately parallel to the terrace, electrically couples to the exposed pads. Mechanical stops (460-1) are formed on respective semiconductor die for mechanical contact between the semiconductor die and the ramp component. The ramp component is electrically coupled to the semiconductor dies using microsprings (114). Consequently, the electrical contacts may have a conductive, a capacitive or, in general, a complex impedance. By removing the need for costly and area-consuming through-silicon vias ( TSV s) in the semiconductor dies, the chip package facilitates chips to be stacked in a manner that provides high bandwidth and low cost.

公开(公告)号：EP2056344B1

公开(公告)日：2015-01-07

申请号：EP07791499.2

申请日：2007-07-27

申请人： Kyocera Corporation ,  FJ Composite Materials Co., Ltd.

发明人： YONEDA, Atsurou ,  ABUMITA, Tetsurou ,  UEDA, Yoshiaki ,  TSUSHIMA, Eiki

IPC分类号： H01L23/373 ,  H01L23/02

CPC分类号： H01L23/66 ,  H01L23/3735 ,  H01L23/3736 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01055 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16195 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic component storing package which generates a large quantity of heat during operation and an electronic apparatus storing such an electronic component are provided. In the electronic component storing package and the electronic apparatus, a heat dissipating member (1) is used which comprising at least five layers including first metal layers (11) having good thermal conductivity and second metal layers (12) having a smaller coefficient of thermal expansion and less thickness compared with the first metal layers (11), the first metal layers (11) and second metal layers (12) being alternately stacked, the first metal layers uppermost and lowermost layers of the layers, a thickness of at least one internally-arranged first metal layer (11a) being thicker than that of the lowermost and uppermost layers. Accordingly, heat generated from the electronic component (5) can be dissipated well to the outside, and a coefficient of thermal expansion of a mounting portion (1a) can be brought close to that of the electronic component (5) or the like.

公开(公告)号：EP1312124B1

公开(公告)日：2014-10-01

申请号：EP01971630.7

申请日：2001-08-22

申请人： OSRAM Opto Semiconductors GmbH

发明人： BOGNER, Georg ,  BRUNNER, Herbert ,  LEX, Wolfgang ,  WAITL, Günter

IPC分类号： H01L33/48 ,  H01L31/0203

CPC分类号： H01L33/486 ,  H01L25/13 ,  H01L25/167 ,  H01L2224/48091 ,  H01L2924/01055 ,  H01L2924/01068 ,  H01L2924/12041 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00

公开(公告)号：EP2056344A4

公开(公告)日：2012-12-19

申请号：EP07791499

申请日：2007-07-27

申请人： KYOCERA CORP ,  FJ COMPOSITE MATERIALS CO LTD

发明人： YONEDA ATSUROU ,  ABUMITA TETSUROU ,  UEDA YOSHIAKI ,  TSUSHIMA EIKI

IPC分类号： H01L23/373 ,  H01L23/02

CPC分类号： H01L23/66 ,  H01L23/3735 ,  H01L23/3736 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01055 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16195 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic component storing package which generates a large quantity of heat during operation and an electronic apparatus storing such an electronic component are provided. In the electronic component storing package and the electronic apparatus, a heat dissipating member (1) is used which comprising at least five layers including first metal layers (11) having good thermal conductivity and second metal layers (12) having a smaller coefficient of thermal expansion and less thickness compared with the first metal layers (11), the first metal layers (11) and second metal layers (12) being alternately stacked, the first metal layers uppermost and lowermost layers of the layers, a thickness of at least one internally-arranged first metal layer (11a) being thicker than that of the lowermost and uppermost layers. Accordingly, heat generated from the electronic component (5) can be dissipated well to the outside, and a coefficient of thermal expansion of a mounting portion (1a) can be brought close to that of the electronic component (5) or the like.

公开(公告)号：EP2492956A1

公开(公告)日：2012-08-29

申请号：EP10824628.1

申请日：2010-10-13

申请人： Sumitomo Bakelite Co., Ltd.

发明人： MEURA, Toru ,  NIKAIDO, Hiroki ,  MAEJIMA, Kenzou ,  ISHIMURA, Yoji ,  YOSHIDA, Kenji

IPC分类号： H01L21/60 ,  H01L21/02 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L24/81 ,  C08L63/00 ,  C09D163/00 ,  H01L24/75 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/13023 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/29191 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/7511 ,  H01L2224/75283 ,  H01L2224/7531 ,  H01L2224/7598 ,  H01L2224/81193 ,  H01L2224/81209 ,  H01L2224/8121 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/83209 ,  H01L2224/83801 ,  H01L2224/83855 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01055 ,  H01L2924/01059 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/181 ,  Y10T29/41 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/05552

摘要： Disclosed is a method of manufacturing an electronic device, the method includes obtaining a stack (4) of the first electronic component (1) and the second electronic component (2), while placing a resin layer (3) which contains a flux-active compound and a thermosetting resin, between the first terminals (11) and the second terminals (21); bonding the first terminals (11) and the second terminals (21) with solder, by heating the stack (4) at a temperature not lower than the melting point of solder layers (112) on the first terminals (11), while pressurizing the stack (4) using a fluid; and curing the resin layer (3), wherein in the process of bonding the first terminals (11) and the second terminals (21) with solder, the duration from the point of time immediately after the start of heating of the stack (4), up to the point of time when the temperature of the stack (4) reaches the melting point of the solder layers (112), is set to 5 seconds or longer, and 15 minutes or shorter.

摘要翻译： 本发明公开了制造电子器件的方法，该方法包括获取一个堆（4）在第一电子部件（1）和第二电子元件（2），同时将一个树脂层（3），其含有一个助熔剂活性 化合物和热固性树脂，所述第一端子（11）和第二端子（21）之间; 接合第一端子（11）和第二端子（21）与焊料，通过在不低于所述第一端子（11）焊料层（112）的熔点低的温度下加热所述堆组（4），而加压 堆组（4），使用的流体; 并固化树脂层（3），在栈中的加热开始后，立即从所述时间点处的第一端子（11）和第二端子（21）与，持续时间结合的过程worin焊料（4） ，最多的时间点直到堆栈（4）的温度达到焊料层的熔点（112）被设置为5秒或更长，15分钟或更短。

公开(公告)号：EP2393111A1

公开(公告)日：2011-12-07

申请号：EP11168190.4

申请日：2011-05-31

申请人： NXP B.V.

发明人： Blednov, Igor

IPC分类号： H01L23/49 ,  H01L23/52 ,  H01L23/66 ,  H01L27/04 ,  H03F1/56 ,  H03F1/02

CPC分类号： H03F1/565 ,  H01L23/645 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/49111 ,  H01L2224/4917 ,  H01L2224/49174 ,  H01L2224/49176 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H03F1/0288 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A bond wire circuit includes bond wires arranged relatively to provide a selected inductance. In connection with various example embodiments, respective bond wire loops including forward and return current paths are arranged orthogonally. Each loop includes a forward bond wire connecting an input terminal with an intermediate terminal, and a return bond wire connecting the intermediate terminal to an output terminal. The return bond wires generally mitigate return current flow from the intermediate terminal in an underlying substrate. In some implementations, the loops are arranged such that current flowing in each of the respective loops generates equal and self-cancelling current in the other of the respective loops.

摘要翻译： 接合线电路包括相对于提供所选择的电感布置的接合线。 结合各种示例实施例，包括正向和回流电流路径的各个接合线环路被布置成正交。 每个环路包括将输入端子与中间端子连接的正向接合线以及将中间端子连接到输出端子的返回接合线。 返回接合线通常减轻来自底层衬底中的中间端子的回流电流。 在一些实施方案中，循环被布置成使得在每个相应回路中流动的电流在相应回路中的另一个中产生相等的自消除电流。

公开(公告)号：EP2352166A1

公开(公告)日：2011-08-03

申请号：EP09829030.7

申请日：2009-11-19

申请人： Nitto Denko Corporation

发明人： NISHIO, Akinori ,  KIUCHI, Kazuyuki ,  TAKAHAShi, Tomokazu

IPC分类号： H01L21/301 ,  C09J7/02 ,  H01L21/683

CPC分类号： H01L21/67132 ,  B32B7/12 ,  B32B27/08 ,  B32B27/36 ,  B32B2255/10 ,  B32B2255/26 ,  B32B2307/51 ,  B32B2405/00 ,  C09J7/29 ,  C09J2201/162 ,  C09J2203/326 ,  C09J2205/31 ,  H01L21/6836 ,  H01L24/27 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2924/01019 ,  H01L2924/01055 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/181 ,  Y10T428/28 ,  Y10T428/2848 ,  H01L2924/3512 ,  H01L2924/00

摘要： The present invention aims to provide a surface protection tape for use in a dicing step, which protects a surface of a material to be cut from staining owing to attachment of dust and the like such as shavings by sticking the surface protection tape on the surface of the material to be cut in the dicing step and cutting the tape together with the material to be cut, and which is easily peeled and removed from individual chips after the dicing step. There is provided a surface protection tape for dicing to be stuck on a surface of a material to be cut and to be cut together with the material to be cut, which includes a contractible film layer that contracts in at least one axis direction by a stimulus and laminated thereon a restriction layer that restricts the contraction of the contractible film layer, and which is peeled off with undergoing spontaneous rolling from one end part in one direction or from opposing two end parts toward a center to form one or two cylindrical rolls when the stimulus that causes the contraction is applied.

摘要翻译： 本发明的目的是在切割步骤，其保护的材料的表面，以从由于附着灰尘等的染色切用途提供一个表面保护带：如通过粘贴的表面上的表面保护带刨花 在切割步骤，并与材料一起切断胶带要被切割材料被切割，并且所有这一切都在切割步骤之后被容易地剥离，并从各个芯片移除。 本发明提供一种表面保护带在切割被卡住的材料的表面上，以进行切割和以与待切割的材料，其包括可收缩的薄膜层一起切断没有在至少一个轴方向收缩由刺激 和层叠在其上的约束层没有限制收缩性膜层的收缩，和所有其与在一个方向或从相对的两个端部朝向中心从一端部进行自发卷起以形成一个或两个筒状卷起体时的剥离 刺激没有引起收缩被应用。

公开(公告)号：EP2063460A4

公开(公告)日：2011-08-03

申请号：EP06797847

申请日：2006-09-12

申请人： NITTO DENKO CORP

发明人： MATSUMURA TAKESHI ,  MISUMI SADAHITO

IPC分类号： H01L21/683

CPC分类号： H01L24/83 ,  C09J7/20 ,  C09J2201/36 ,  C09J2201/606 ,  C09J2201/61 ,  C09J2203/326 ,  C09J2205/31 ,  C09J2433/00 ,  H01L21/67132 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3142 ,  H01L24/27 ,  H01L24/29 ,  H01L24/48 ,  H01L24/85 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2224/274 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29386 ,  H01L2224/29393 ,  H01L2224/48 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/8388 ,  H01L2224/85 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/3025 ,  Y10T428/26 ,  H01L2924/0675 ,  H01L2924/0635 ,  H01L2924/066 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/05432 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The invention relates to a dicing die-bonding film having a pressure-sensitive adhesive layer and a die bonding adhesive layer being sequentially laminated on a supporting substrate, wherein the pressure-sensitive adhesive layer has a thickness of 10 µm to 80 µm, and has a storage elastic modulus at 23 °C of 1 x 10 4 to 1 x 10 10 Pa.

公开(公告)号：EP1085594B1

公开(公告)日：2010-01-06

申请号：EP00119475.2

申请日：2000-09-15

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Ishida, Masaaki, c/o Toshiba Corporation ,  Matsui, Norio, c/o Toshiba Corporation

IPC分类号： H01P3/08

CPC分类号： H01P3/088 ,  H01L2224/32188 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01055 ,  H01L2924/01079 ,  H01L2924/1423 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16195 ,  H01L2924/3025 ,  H05K1/0203 ,  H05K1/021 ,  H05K1/0237 ,  H05K1/0298 ,  H05K1/182 ,  H05K3/0061 ,  H05K2201/0352 ,  H01L2924/00014

公开(公告)号：EP2102867A2

公开(公告)日：2009-09-23

申请号：EP07865620.4

申请日：2007-12-13

申请人： Rambus, Inc.

发明人： BEST, Scott ,  LI, Ming

IPC分类号： G11C5/02

CPC分类号： G11C11/4093 ,  G11C5/02 ,  G11C5/025 ,  G11C5/04 ,  G11C11/4096 ,  H01L23/481 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00

摘要： An integrated circuit (IC) package includes an interface die and a separate storage die. The interface die has a synchronous interface to receive memory access commands from an external memory controller, and has a plurality of clockless memory control interfaces to output row and column control signals that correspond to the memory access commands. The storage die has a plurality of independently accessible storage arrays and corresponding access-control interfaces to receive the row and column control signals from the clockless memory control interfaces, each of the access-control interfaces including data output circuitry to output read data corresponding to a given one of the memory access commands in a time-multiplexed transmission.