Demodulating an angle-modulated signal
    5.
    发明公开
    Demodulating an angle-modulated signal 失效
    Demodulierung eines winkelmodulierten信号。

    公开(公告)号:EP0255175A2

    公开(公告)日:1988-02-03

    申请号:EP87201394.1

    申请日:1987-07-21

    IPC分类号: H03D3/00

    CPC分类号: H03D3/008 H03D7/165

    摘要: A zero-IF receiver for an FM signal comprises quadrature-mixers (2,3) to which the input signal is applied and which mix the received carrier down to zero frequency. The signals appearing at the mixer outputs (11,12) are fed to a differentiate, multiply and subtract demodulator (22,23,25,27,31) via capacitors (17,19) which block the d.c. components of the signals, thereby preventing amplifier saturation effects, etc This d.c.-blocking would, unless steps were taken to prevent it, result in distortion of the output signal appearing at an output terminal (32). This distortion is prevented by providing an amplitude divider (33) in the output signal path. The signal fed to the divider control input (48) is derived from the output signals of the blocking capacitors by squaring them by means of multipliers (37,40), adding the results together in an adder (43) and applying the adder output signal to the control input (48) both directly and via a low-pass filter (46) the cut-off frequency of which is equal to that of the high-pass filters (15,16) of which the blocking capacitors effectively form part.

    摘要翻译: 用于FM信号的零中频接收器包括正交混频器(2,3),输入信号被施加到正交混频器(2,3),并将接收的载波下变频至零频率。 出现在混频器输出端(11,12)的信号经由电容器(17,19)馈送到差分,乘法和减法解调器(22,23,25,27,31),阻塞直流电源。 信号的分量,从而防止放大器饱和效应等。除非采取措施防止这种干扰将导致出现在输出端(32)的输出信号的失真。 通过在输出信号路径中设置分频器(33)来防止该失真。 馈送到分频器控制输入端(48)的信号通过乘法器(37,40)对它们进行平方而从阻塞电容器的输出信号导出,将结果加在加法器(43)中,并将加法器输出信号 直接和通过低通滤波器(46)连接到控制输入端(48),其截止频率等于其中阻塞电容器有效地形成其一部分的高通滤波器(15,16)的截止频率。

    Four quadrant multiplier circuit and a receiver including such a circuit
    6.
    发明公开
    Four quadrant multiplier circuit and a receiver including such a circuit 失效
    四个象限乘法器和这样的含电路的接收器。

    公开(公告)号:EP0623993A3

    公开(公告)日:1995-01-18

    申请号:EP94200921.8

    申请日:1994-04-05

    IPC分类号: H03D3/00 G06G7/163

    摘要: A four quadrant multiplier circuit having a high dynamic range and capable of operating at low voltages comprises a dual transconductance amplifier circuit (TAC) consisting of NPN transistors (20 to 23 and 64 to 67), coupled to a first input port (36), first and second folded Darlington circuits (57,58), and a resistive element (78). Each said Darlington circuit comprises first and second NPN transistors (68,70 and 69,71) whose emitter-collector paths are connected in series and a third PNP transistor (72,73) having its emitter-collector path connected between the collector of the first transistor (68,69) and the base electrode of the second transistor (70,71). The emitter-collector junction (76,77) of the first and second transistors (68,70 and 69,71) is connected to the base electrode of the third transistor (72,73). The resistive element (78) is connected between the base electrodes of the third transistors (72,73). A second input port (56) is connected to the base electrodes of the first transistors (68,69). The emitter currents of the dual transconductance amplifier are supplied by way of current mirror circuits (80,81) from the emitter currents of the second transistors (70,71). The transconductance amplifier circuit (TAC) may be of any suitable type which has its transconductance linearly proportional to its emitter currents. In a refinement of the circuit, the current to voltage converter function of the current mirrors is carried out by the second transistors (70,71) and the transistors (82,83) of the current mirror circuits (80,81) are omitted.

    Four quadrant multiplier circuit and a receiver including such a circuit
    7.
    发明公开
    Four quadrant multiplier circuit and a receiver including such a circuit 失效
    Vierquadranten-Multiplizierschaltung und eine solche Schaltung enthaltenderEmpfänger。

    公开(公告)号:EP0623993A2

    公开(公告)日:1994-11-09

    申请号:EP94200921.8

    申请日:1994-04-05

    IPC分类号: H03D3/00 G06G7/163

    摘要: A four quadrant multiplier circuit having a high dynamic range and capable of operating at low voltages comprises a dual transconductance amplifier circuit (TAC) consisting of NPN transistors (20 to 23 and 64 to 67), coupled to a first input port (36), first and second folded Darlington circuits (57,58), and a resistive element (78). Each said Darlington circuit comprises first and second NPN transistors (68,70 and 69,71) whose emitter-collector paths are connected in series and a third PNP transistor (72,73) having its emitter-collector path connected between the collector of the first transistor (68,69) and the base electrode of the second transistor (70,71). The emitter-collector junction (76,77) of the first and second transistors (68,70 and 69,71) is connected to the base electrode of the third transistor (72,73). The resistive element (78) is connected between the base electrodes of the third transistors (72,73). A second input port (56) is connected to the base electrodes of the first transistors (68,69). The emitter currents of the dual transconductance amplifier are supplied by way of current mirror circuits (80,81) from the emitter currents of the second transistors (70,71). The transconductance amplifier circuit (TAC) may be of any suitable type which has its transconductance linearly proportional to its emitter currents. In a refinement of the circuit, the current to voltage converter function of the current mirrors is carried out by the second transistors (70,71) and the transistors (82,83) of the current mirror circuits (80,81) are omitted.

    摘要翻译: 具有高动态范围且能够在低电压下操作的四象限乘法器电路包括由NPN晶体管(20至23和64至67)组成的双跨导放大器电路(TAC),耦合到第一输入端口(36), 第一和第二折叠达林顿电路(57,58)和电阻元件(78)。 每个所述达林顿电路包括其发射极 - 集电极路径串联连接的第一和第二NPN晶体管(68,70和69,71)和第三PNP晶体管(72,73),其发射极 - 集电极路径连接在 第一晶体管(68,69)和第二晶体管(70,71)的基极。 第一和第二晶体管(68,70和69,71)的发射极 - 集电极结(76,77)连接到第三晶体管(72,73)的基极。 电阻元件(78)连接在第三晶体管(72,73)的基极之间。 第二输入端口(56)连接到第一晶体管(68,69)的基极。 双重跨导放大器的发射极电流通过来自第二晶体管(70,71)的发射极电流的电流镜电路(80,81)提供。 跨导放大器电路(TAC)可以是任何合适的类型,其跨导与其发射极电流成线性比例。 在电路的改进中,电流镜的电流到电压转换器的功能由第二晶体管(70,71)进行,并且省略电流镜电路(80,81)的晶体管(82,83)。

    Transconductance amplifier
    8.
    发明公开
    Transconductance amplifier 失效
    Transkonduktanzverstärker。

    公开(公告)号:EP0603942A1

    公开(公告)日:1994-06-29

    申请号:EP93203507.4

    申请日:1993-12-14

    IPC分类号: H03F3/45

    CPC分类号: H03F1/3211 H03F1/56

    摘要: A transconductance amplifier comprises first and second input transistors (TO1,TO2) to the base electrodes of which an input voltage (Vi) is applied. A constant current source (10) is connected to the emitters of the input transistors. Outputs are derived from their collector electrodes. A tapped impedance having two or more segments (RO to RN,RN to RO) is connected between the base electrodes of the input transistors (TO1,TO2). The base of a further transistor (T1 to TN,TN to T1) is connected to a respective tap (a1 to aN,aN to a1) of the tapped impedance. The emitter areas (e1 to eN,eN to e1) of these further transistors increase from each end of the tapped impedance towards the centre (28) of the tapped impedance. The emitters of the further transistors (T1 to TN,TN to T1) are connected to the current source (10) and the collectors are connected to a junction (26) which is connected to means (30) for computing the combined base currents of the further transistors (T1 to TN, TN to T1) from the combined collector currents at said junction (26). The computed current is supplied by a current mirror circuit (32) to the centre (28) of the tapped impedance to pull up the voltage at the centre (28). The tapped impedance can have an increased resistance without unduly loading a preceding stage.

    摘要翻译: 跨导放大器包括施加输入电压(Vi)的基极的第一和第二输入晶体管(TO1,TO2)。 恒流源(10)连接到输入晶体管的发射极。 输出源自其集电极。 具有两个或多个段(RO至RN,RN至RO)的抽头阻抗连接在输入晶体管(TO1,TO2)的基极之间。 另外的晶体管(T1至TN,TN至T1)的基极连接到抽头阻抗的各个抽头(a1至aN,aN至a1)。 这些另外的晶体管的发射极区域(e1至eN,eN至e1)从抽头阻抗的每端向抽头阻抗的中心(28)增加。 另外的晶体管(T1至TN,TN至T1)的发射极连接到电流源(10),并且集电极连接到连接到装置(30)的结(26),用于计算组合的基极电流 来自所述结(26)处的组合集电极电流的另外的晶体管(T1至TN,TN至T1)。 计算出的电流由电流镜电路(32)提供给抽头阻抗的中心(28),以将中心电压(28)拉高。 抽头阻抗可以具有增加的电阻,而不会过度地加载前一级。

    Filter
    9.
    发明公开
    Filter 失效
    过滤

    公开(公告)号:EP0270192A3

    公开(公告)日:1989-05-10

    申请号:EP87202389.0

    申请日:1987-12-02

    IPC分类号: H03H11/12 H03H19/00

    CPC分类号: H03H19/004 H03H11/126

    摘要: A filter comprises an amplifier circuit arrangement having a signal input (1) and a signal output (8) and a coupling (36) between a point (37) on a signal path (39) to the signal input and a point (38) on a signal path from the signal output. The amplifier circuit arrangement comprises an inverting amplifier (6) to the input (5) of which the signal an input (1) is connected via a series impedance (7), e.g. a resistor. A feedback impedance (9), e.g. a capacitor, connects the amplifier output (8) to its input (5) so that this input constitutes a virtual earth. The phase relationship between the input and output signals of such an arrangement changes from inverting to non-inverting at frequencies at which the gain of the amplifier drops to below unity, because of forward feed through the feedback impedance (9), thereby upsetting the phase relationship between the signals passing through the arrangement and those passing through the coupling. Accordingly a further impedance (10), e.g. a capacitance, is provided between the common point (11) of the series and feedback impedances and ground. At frequencies at which the amplifier gain is high this has virtually no effect, because of the virtual earth existing at the common point (11). However, at frequencies at which the amplifier gain drops to unity or below the virtual earth effect is lost and the further impedance forms a potential divider with the series impedance (7), reducing the proportion of the input signal which can take the direct forward path through the feedback impedance.

    摘要翻译: 滤波器包括具有信号输入(1)和信号输出(8)的放大器电路装置和信号路径(39)上的信号输入端(38)和点(38)之间的耦合(36) 在信号输出的信号路径上。 放大器电路装置包括到输入端(5)的反相放大器(6),输入端(5)的信号通过串联阻抗(7)连接到输入端(1)。 一个电阻 反馈阻抗(9),例如 电容器将放大器输出(8)连接到其输入(5),使得该输入构成虚拟地球。 这种布置的输入和输出信号之间的相位关系由于通过反馈阻抗(9)的正向馈送而由放大器的增益下降到低于1的频率处从反相变为非反相,从而使相位失真 通过布置的信号与通过耦合的信号之间的关系。 因此,进一步的阻抗(10),例如 在串联的公共点(11)和反馈阻抗和接地之间提供电容。 在放大器增益高的频率下,由于虚拟地线存在于公共点(11),所以实际上没有任何影响。 然而,在放大器增益下降到单位或低于虚拟地球效应的频率处,并且阻抗形成具有串联阻抗(7)的分压器,从而减小可以采用直接正向路径的输入信号的比例 通过反馈阻抗。