摘要:
A zero-IF receiver for an FM signal comprises quadrature-mixers (2,3) to which the input signal is applied and which mix the received carrier down to zero frequency. The signals appearing at the mixer outputs (11,12) are fed to a differentiate, multiply and subtract demodulator (22,23,25,27,31) via capacitors (17,19) which block the d.c. components of the signals, thereby preventing amplifier saturation effects, etc This d.c.-blocking would, unless steps were taken to prevent it, result in distortion of the output signal appearing at an output terminal (32). This distortion is prevented by providing an amplitude divider (33) in the output signal path. The signal fed to the divider control input (48) is derived from the output signals of the blocking capacitors by squaring them by means of multipliers (37,40), adding the results together in an adder (43) and applying the adder output signal to the control input (48) both directly and via a low-pass filter (46) the cut-off frequency of which is equal to that of the high-pass filters (15,16) of which the blocking capacitors effectively form part.
摘要:
A four quadrant multiplier circuit having a high dynamic range and capable of operating at low voltages comprises a dual transconductance amplifier circuit (TAC) consisting of NPN transistors (20 to 23 and 64 to 67), coupled to a first input port (36), first and second folded Darlington circuits (57,58), and a resistive element (78). Each said Darlington circuit comprises first and second NPN transistors (68,70 and 69,71) whose emitter-collector paths are connected in series and a third PNP transistor (72,73) having its emitter-collector path connected between the collector of the first transistor (68,69) and the base electrode of the second transistor (70,71). The emitter-collector junction (76,77) of the first and second transistors (68,70 and 69,71) is connected to the base electrode of the third transistor (72,73). The resistive element (78) is connected between the base electrodes of the third transistors (72,73). A second input port (56) is connected to the base electrodes of the first transistors (68,69). The emitter currents of the dual transconductance amplifier are supplied by way of current mirror circuits (80,81) from the emitter currents of the second transistors (70,71). The transconductance amplifier circuit (TAC) may be of any suitable type which has its transconductance linearly proportional to its emitter currents. In a refinement of the circuit, the current to voltage converter function of the current mirrors is carried out by the second transistors (70,71) and the transistors (82,83) of the current mirror circuits (80,81) are omitted.
摘要:
A four quadrant multiplier circuit having a high dynamic range and capable of operating at low voltages comprises a dual transconductance amplifier circuit (TAC) consisting of NPN transistors (20 to 23 and 64 to 67), coupled to a first input port (36), first and second folded Darlington circuits (57,58), and a resistive element (78). Each said Darlington circuit comprises first and second NPN transistors (68,70 and 69,71) whose emitter-collector paths are connected in series and a third PNP transistor (72,73) having its emitter-collector path connected between the collector of the first transistor (68,69) and the base electrode of the second transistor (70,71). The emitter-collector junction (76,77) of the first and second transistors (68,70 and 69,71) is connected to the base electrode of the third transistor (72,73). The resistive element (78) is connected between the base electrodes of the third transistors (72,73). A second input port (56) is connected to the base electrodes of the first transistors (68,69). The emitter currents of the dual transconductance amplifier are supplied by way of current mirror circuits (80,81) from the emitter currents of the second transistors (70,71). The transconductance amplifier circuit (TAC) may be of any suitable type which has its transconductance linearly proportional to its emitter currents. In a refinement of the circuit, the current to voltage converter function of the current mirrors is carried out by the second transistors (70,71) and the transistors (82,83) of the current mirror circuits (80,81) are omitted.
摘要:
A transconductance amplifier comprises first and second input transistors (TO1,TO2) to the base electrodes of which an input voltage (Vi) is applied. A constant current source (10) is connected to the emitters of the input transistors. Outputs are derived from their collector electrodes. A tapped impedance having two or more segments (RO to RN,RN to RO) is connected between the base electrodes of the input transistors (TO1,TO2). The base of a further transistor (T1 to TN,TN to T1) is connected to a respective tap (a1 to aN,aN to a1) of the tapped impedance. The emitter areas (e1 to eN,eN to e1) of these further transistors increase from each end of the tapped impedance towards the centre (28) of the tapped impedance. The emitters of the further transistors (T1 to TN,TN to T1) are connected to the current source (10) and the collectors are connected to a junction (26) which is connected to means (30) for computing the combined base currents of the further transistors (T1 to TN, TN to T1) from the combined collector currents at said junction (26). The computed current is supplied by a current mirror circuit (32) to the centre (28) of the tapped impedance to pull up the voltage at the centre (28). The tapped impedance can have an increased resistance without unduly loading a preceding stage.
摘要:
A filter comprises an amplifier circuit arrangement having a signal input (1) and a signal output (8) and a coupling (36) between a point (37) on a signal path (39) to the signal input and a point (38) on a signal path from the signal output. The amplifier circuit arrangement comprises an inverting amplifier (6) to the input (5) of which the signal an input (1) is connected via a series impedance (7), e.g. a resistor. A feedback impedance (9), e.g. a capacitor, connects the amplifier output (8) to its input (5) so that this input constitutes a virtual earth. The phase relationship between the input and output signals of such an arrangement changes from inverting to non-inverting at frequencies at which the gain of the amplifier drops to below unity, because of forward feed through the feedback impedance (9), thereby upsetting the phase relationship between the signals passing through the arrangement and those passing through the coupling. Accordingly a further impedance (10), e.g. a capacitance, is provided between the common point (11) of the series and feedback impedances and ground. At frequencies at which the amplifier gain is high this has virtually no effect, because of the virtual earth existing at the common point (11). However, at frequencies at which the amplifier gain drops to unity or below the virtual earth effect is lost and the further impedance forms a potential divider with the series impedance (7), reducing the proportion of the input signal which can take the direct forward path through the feedback impedance.