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11 条记录 (耗时 0.014 秒)

    A HIGHLY LINEAR EMBEDDED FILTERING PASSIVE MIXER
    3.
    发明公开
    A HIGHLY LINEAR EMBEDDED FILTERING PASSIVE MIXER 审中-公开
    HOCHLINEARER PASSIVER MISCHER MIT EINGEBETTETER FILTERUNG

    公开(公告)号：EP2277260A1

    公开(公告)日：2011-01-26

    申请号：EP09730980.1

    申请日：2009-04-07

    申请人： Qualcomm Incorporated

    发明人： KIM, Namsoo ,  GUDEM, Prasad, S. ,  VLADIMIR, Aparin

    IPC分类号： H03D7/16

    CPC分类号： H03D7/163 ,  H03D7/1466 ,  H03D7/166

    摘要： A communication channel has a highly linear switched current mixer that incorporates passive filtering (e.g., low pass, notch) for improved transmitting (Tx) and receiving (Rx) with adding external filtering components. A high IIP2 (input referenced second order intercept point) of the receiver at the Tx offset is essential to avoid corrupting the system's sensitivity performance, and a high triple beat (TB) is required to avoid sensitivity degradation due to transmitter leakage. Thanks to the embedded filtering in the mixer and the active post-distortion (APD) method in a low noise amplifier (LNA), the required high linearity is achieved with low noise figure and power consumption, overcoming transmitter power leakage without the use of a SAW (surface acoustic wave) filter.

    摘要翻译： 通信通道具有高度线性的开关电流混频器，其结合无源滤波（例如，低通，陷波），用于通过添加外部滤波组件来改进发射（Tx）和接收（Rx）。 接收机在Tx偏移处的高IIP2（输入参考二阶截取点）对于避免破坏系统的灵敏度性能至关重要，并且需要高三重（TB）以避免由于发射机泄漏引起的灵敏度劣化。 由于混频器中的嵌入式滤波器和低噪声放大器（LNA）中的主动后失真（APD）方法，所需的高线性度可通过低噪声系数和功耗实现，克服发射机功率泄漏而不使用 SAW（表面声波）滤波器。

    INTERFERENCE DETECTION APPARATUS AND METHOD
    5.
    发明公开
    INTERFERENCE DETECTION APPARATUS AND METHOD 审中-公开
    故障检测装置及方法

    公开(公告)号：EP2319185A1

    公开(公告)日：2011-05-11

    申请号：EP09792012.8

    申请日：2009-08-27

    申请人： QUALCOMM Incorporated

    发明人： PATEL, Shrenik ,  GUDEM, Prasad, S. ,  PALAKURTY, Saraswathi

    IPC分类号： H04B1/10

    CPC分类号： H04K3/82 ,  H04B1/1027 ,  H04B1/109

    摘要： Techniques for detecting jammers in a received signal are described. A jammer detector includes a jammer filter for attenuating transmit signals leaked into the receive path, a pulse generator for converting the interference signals into discrete-level pulses, and a pulse processor for determining the presence of jammers in the discrete-level pulses. In an exemplary embodiment, the pulse processor is configured to further discriminate among close-in jammers that are close to the desired receive frequency, far-away jammers, and jammers arising from the transmit signals leaked into the receive path. In another exemplary embodiment, hysteresis is provided in the pulse generator to enable the generation of reliable pulses. Further aspects include configuring the jammer detector for operation in a plurality of frequency bands and/or according to a plurality of communications standards.

    HIGH-LINEARITY RECEIVER WITH TRANSMIT LEAKAGE CANCELLATION
    6.
    发明公开
    HIGH-LINEARITY RECEIVER WITH TRANSMIT LEAKAGE CANCELLATION 有权
    带减速传输损耗高线性接收机

    公开(公告)号：EP2263321A1

    公开(公告)日：2010-12-22

    申请号：EP09719148.0

    申请日：2009-03-11

    申请人： QUALCOMM Incorporated

    发明人： GUDEM, Prasad, S. ,  CHANG, Li-Chung

    IPC分类号： H04B1/52

    CPC分类号： H04B1/525

    摘要： Techniques for performing transmit (TX) leakage cancellation are described. A receiver includes a low noise amplifier (LNA) and a TX leakage canceller. The LNA amplifies a receiver input signal and provides an amplified signal. The TX leakage canceller includes a downconverter, a notch filter, and an upconverter. The downconverter downconverts a canceller input signal (e.g., obtained from the LNA output) with a first LO signal at a transmit frequency and provides a downconverted signal. The notch filter filters the downconverted signal to pass an undesired signal (e.g., a TX leakage signal) and attenuate a jammer and a desired signal in the canceller input signal. The upconverter upconverts the filtered signal with a second LO signal at the transmit frequency and provides a feedback signal. The feedback signal is subtracted at the input or output of the LNA to cancel the undesired signal.

    HIGH-LINEARITY LOW-NOISE RECEIVER WITH LOAD SWITCHING
    7.
    发明公开
    HIGH-LINEARITY LOW-NOISE RECEIVER WITH LOAD SWITCHING 有权
    HOCHLINEARER RAUSCHARMEREMPFÄNGERMIT LASTUMSCHALTUNG

    公开(公告)号：EP2327152A1

    公开(公告)日：2011-06-01

    申请号：EP09791629.0

    申请日：2009-08-18

    申请人： QUALCOMM Incorporated

    发明人： LIU, Li ,  GUDEM, Prasad, S.

    IPC分类号： H03F1/56 ,  H03F3/45

    CPC分类号： H03F1/32 ,  H03F1/0277 ,  H03F1/223 ,  H03F1/56 ,  H03F3/45188 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/336 ,  H03F2203/45386 ,  H03F2203/45394 ,  H03F2203/45726 ,  H03F2203/7206 ,  H03F2203/7236 ,  H04B1/109 ,  H04B1/18

    摘要： A receiver includes a low noise amplifier (LNA) and multiple pairs of mixers. The LNA receives and amplifies an LNA input signal and provides at least one LNA output signal. Each pair of mixers downconverts one of the at least one LNA output signal when enabled. Each pair of mixers may be selectively enabled or disabled, e.g., based on a mode selected from among multiple modes. In one design, the LNA includes multiple load sections coupled in parallel. Each load section may be selectively enabled or disabled, e.g., based on the selected mode. In one design, first and second pairs of mixers and first and second load sections may be enabled for a high linearity mode. The first pair of mixers and the first load section may be enabled and the second pair of mixers and the second load section may be disabled for a low linearity mode.

    摘要翻译： 接收机包括低噪声放大器（LNA）和多对混频器。 LNA接收并放大LNA输入信号并提供至少一个LNA输出信号。 当使能时，每对混频器下变频至少一个LNA输出信号。 可以例如基于从多个模式中选择的模式来选择性地启用或禁用每对混频器。 在一个设计中，LNA包括并联耦合的多个负载部分。 可以例如基于所选择的模式来选择性地启用或禁用每个加载部分。 在一种设计中，第一和第二对混频器以及第一和第二负载部分可被启用用于高线性模式。 可以启用第一对混频器和第一负载部分，并且可以对于低线性模式禁用第二对混频器和第二负载部分。

    METHODS AND APPARATUS FOR POWER REDUCTION IN A TRANSCEIVER
    8.
    发明公开
    METHODS AND APPARATUS FOR POWER REDUCTION IN A TRANSCEIVER 审中-公开
    方法和降低功率器件的发射机/接收机

    公开(公告)号：EP2310927A2

    公开(公告)日：2011-04-20

    申请号：EP09759242.2

    申请日：2009-06-02

    申请人： QUALCOMM Incorporated

    发明人： GUDEM, Prasad, S. ,  CICCARELLI, Steven, C. ,  MOK, Ken Tsz Kin ,  KWOK, Sai, C.

    IPC分类号： G05F1/56 ,  H04B1/16

    CPC分类号： H03F1/304 ,  H03F1/0244 ,  H03F1/32 ,  H03F3/195 ,  H03F3/24 ,  H03F2200/451 ,  H03F2200/468 ,  H03F2200/511

    摘要： An integrated circuit for achieving power reduction in a transceiver may include a jammer detector that determines an interference level corresponding to a received signal, and a transmit power detector that determines a required transmit power level for a transmitted signal. The integrated circuit may also include at least one of the following: a process monitor that determines process corners of components within the receiver and/or the transmitter, and a temperature monitor that determines a temperature of the receiver and/or the transmitter. The integrated circuit may also include a state machine. The state machine may transition the receiver from a high linearity mode to a low linearity mode if a set of operating conditions is satisfied. Similarly, the state machine may transition the transmitter from a high power mode to a low power mode if a set of operating conditions is satisfied.

    METHOD AND APPARATUS FOR PROCESSING A COMMUNICATION SIGNAL IN A RECEIVER
    9.
    发明公开
    METHOD AND APPARATUS FOR PROCESSING A COMMUNICATION SIGNAL IN A RECEIVER 有权
    方法和设备用于处理通信信号接收器

    公开(公告)号：EP2294699A1

    公开(公告)日：2011-03-16

    申请号：EP09731682.2

    申请日：2009-04-15

    申请人： QUALCOMM Incorporated

    发明人： GUDEM, Prasad, S. ,  CABANILLAS, Jose ,  CHANG, Li-Chung ,  LIU, Li

    IPC分类号： H04B1/10

    CPC分类号： H04B1/109 ,  H03F1/3205 ,  H03F1/3211 ,  H03F3/193 ,  H03F3/245

    摘要： A receiver includes a jammer detector configured to detect the presence or the absence of jamming in a communication signal within a gain state. The receiver further includes an amplifier configured to amplify the communication signal in a high linearity receiving mode or a low linearity receiving mode, wherein the high linearity receiving mode corresponds with a lower gain for the gain state in the amplifier relative to that of the low linearity receiving mode. In addition, the receiver includes a processing unit coupled to the jammer detector, the processing unit being configured to control the amplifier to amplify the communication signal in either the high linearity receiving mode or the low linearity receiving mode, based on the output of the jammer detector detecting the presence or the absence of jamming in the communication signal. A method is also provided for processing a communication signal in a receiver.

    Common mode signal attenuation for a differential duplexer
    10.
    发明授权
    Common mode signal attenuation for a differential duplexer 有权
    用于差动双工器的共模信号衰减

    公开(公告)号：EP2186208B1

    公开(公告)日：2011-02-02

    申请号：EP08830496.9

    申请日：2008-09-10

    申请人： QUALCOMM Incorporated

    发明人： CABANILLAS, Jose ,  GUDEM, Prasad, S. ,  KWOK, Sai, Chong ,  LOVE, David

    IPC分类号： H04B1/52

    CPC分类号： H04B1/52 ,  H04B1/18

    摘要： Techniques for attenuating undesired signal components from a differential duplexer are described. The duplexer provides a differential received signal at RX+ and RX- ports. This differential received signal includes an undesired common mode signal, which may come from a transmit signal. The common mode signal is attenuated with a common mode trap in an impedance matching network coupled to the RX+ and RX- ports. The matching network includes a first passive circuit coupled between the RX+ port and a first node, a second passive circuit coupled between the RX- port and a second node, and the common mode trap coupled between the first and second nodes. In one design, the common mode trap includes a first inductor coupled between the first node and a common node, a second inductor coupled between the second node and the common node, and a capacitor coupled between the common node and circuit ground.