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    SEMICONDUCTOR DEVICE
    3.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：EP2491585A4

    公开(公告)日：2015-09-02

    申请号：EP10824778

    申请日：2010-09-27

    申请人： SEMICONDUCTOR ENERGY LAB

    发明人： YAMAZAKI SHUNPEI ,  KOYAMA JUN ,  IMAI KEITARO

    IPC分类号： H01L21/8238 ,  H01L21/822 ,  H01L21/84 ,  H01L27/06 ,  H01L27/12 ,  H01L29/786

    CPC分类号： H01L29/7869 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1207 ,  H01L27/1225

    摘要： An objet of the present invention is to provide a semiconductor device with a new structure. Disclosed is a semiconductor device including a first transistor which includes a channel formation region on a substrate containing a semiconductor material, impurity regions formed with the channel formation region interposed therebetween, a first gate insulating layer over the channel formation region, a first gate electrode over the first gate insulating layer, and a first source electrode and a first drain electrode which are electrically connected to the impurity region; and a second transistor which includes a second gate electrode over the substrate containing a semiconductor material, a second gate insulating layer over the second gate electrode, an oxide semiconductor layer over the second gate insulating layer, and a second source electrode and a second drain electrode which are electrically connected to the oxide semiconductor layer.

    LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE
    4.
    发明公开
    LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE 审中-公开
    LOGIKSCHALTKREIS UND HALBLEITERVORRICHTUNG

    公开(公告)号：EP2489075A4

    公开(公告)日：2014-06-11

    申请号：EP10823293

    申请日：2010-09-24

    申请人： SEMICONDUCTOR ENERGY LAB

    发明人： YAMAZAKI SHUNPEI ,  KOYAMA JUN ,  TSUBUKU MASASHI ,  NODA KOSEI

    IPC分类号： H01L29/786 ,  G09F9/30 ,  H01L21/66 ,  H01L21/8236 ,  H01L27/08 ,  H01L27/088 ,  H01L27/12 ,  H03K19/0944 ,  H03K19/096

    CPC分类号： H01L29/7869 ,  H01L22/34 ,  H01L27/0207 ,  H01L27/1225 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.

    摘要翻译： 逻辑电路包括具有使用氧化物半导体形成的沟道形成区域的薄膜晶体管，以及通过关闭薄膜晶体管而使端子中的一个成为浮置状态的电容器。 氧化物半导体的氢浓度为5×1019（原子/ cm3）以下，因此在不产生电场的状态下基本上用作绝缘体。 因此，可以减小薄膜晶体管的截止电流，从而通过薄膜晶体管抑制存储在电容器中的电荷的泄漏。 因此，可以防止逻辑电路的故障。 此外，通过减小薄膜晶体管的截止电流，可以减少在逻辑电路中流动的过量的电流，导致逻辑电路的低功耗。

    SEMICONDUCTOR DEVICE
    6.
    发明公开
    SEMICONDUCTOR DEVICE 有权
    HALBLEITERBAUELEMENT

    公开(公告)号：EP2526622A4

    公开(公告)日：2013-10-23

    申请号：EP10843972

    申请日：2010-12-14

    申请人： SEMICONDUCTOR ENERGY LAB

    发明人： TAKEMURA YASUHIKO ,  YAMAZAKI SHUNPEI

    IPC分类号： H03K19/177 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/06 ,  H01L27/092 ,  H01L29/786

    CPC分类号： H03K19/0013 ,  H01L27/0629 ,  H01L29/7869 ,  H01L2924/0002 ,  H03K17/161 ,  H03K19/173 ,  H03K19/17724 ,  H03K19/17736 ,  H03K19/1776 ,  H03K19/17772 ,  H03K19/17784 ,  H01L2924/00

    摘要： It is an object to provide a semiconductor device in which power consumption can be reduced. It is another object to provide a highly reliable semiconductor device using a programming cell, such as a programmable logic device (PLD). In accordance with a change in a configuration of connections between basic blocks, power supply voltage furnishing to the basic blocks is changed. That is, when the structure of connections between the basic blocks is such that a basic block does not contribute to a circuit, the supply of the power supply voltage to this basic block is stopped. Further, the supply of the power supply voltage to the basic blocks is controlled using a programming cell formed using a field effect transistor whose channel formation region is formed using an oxide semiconductor, the field effect transistor having extremely low off-state current or extremely low leakage current.

    摘要翻译： 目的是提供一种能够降低功耗的半导体器件。 另一个目的是提供使用诸如可编程逻辑器件（PLD）的编程单元的高度可靠的半导体器件。 根据基本模块之间连接配置的变化，改变基本模块的电源电压供应。 也就是说，当基本块之间的连接结构是基本块对电路没有贡献时，停止向该基本块提供电源电压。 此外，使用由使用氧化物半导体形成沟道形成区的场效应晶体管形成的编程单元来控制对基本块的电源电压的供给，场效应晶体管具有极低的截止电流或极低的电压 漏电流。

    Transistor and display device
    8.
    发明授权
    Transistor and display device 有权
    晶体管和Anzeigevorrichtung

    公开(公告)号：EP2544237B1

    公开(公告)日：2017-05-03

    申请号：EP12181246

    申请日：2010-08-26

    申请人： SEMICONDUCTOR ENERGY LAB

    发明人： YAMAZAKI SHUNPEI ,  SAKAKURA MASAYUKI ,  WATANABE RYOSUKE ,  SAKATA JUNICHIRO ,  AKIMOTO KENGO ,  MIYANAGA AKIHARU ,  HIROHASHI TAKUYA ,  KISHIDA HIDEYUKI

    IPC分类号： H01L27/12 ,  H01L29/04 ,  H01L29/786

    CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

    摘要： The invention provides a transistor comprising a gate electrode layer; a gate insulating layer over the gate electrode layer; an oxide semiconductor layer over the gate insulating layer; and an oxide insulating layer over and in contact with the oxide semiconductor layer, wherein the oxide semiconductor layer includes indium, zinc, and one or more metal elements selected from gallium, aluminum, manganese, cobalt and tin; and wherein a region of the oxide semiconductor layer is formed of microcrystals c-axis-oriented in a direction perpendicular to a surface of the oxide semiconductor layer.

    摘要翻译： 本发明提供了一种包括栅电极层的晶体管; 栅电极层上的栅极绝缘层; 在栅极绝缘层上的氧化物半导体层; 以及在所述氧化物半导体层上并且与所述氧化物半导体层接触的氧化物绝缘层，其中所述氧化物半导体层包括铟，锌以及选自镓，铝，锰，钴和锡中的一种或多种金属元素; 并且其中所述氧化物半导体层的区域由在垂直于所述氧化物半导体层的表面的方向上c轴取向的微晶形成。

    Display device, manufacturing method thereof, and television set
    9.
    发明授权
    Display device, manufacturing method thereof, and television set 有权
    Anzeigevorrichtung，Herstellungsverfahren derselben undFernsehgerät

    公开(公告)号：EP1624333B1

    公开(公告)日：2017-05-03

    申请号：EP05015701

    申请日：2005-07-19

    申请人： SEMICONDUCTOR ENERGY LAB

    发明人： YAMAZAKI SHUNPEI ,  SHOJI HIRONOBU ,  MAEKAWA SHINJI ,  NAKAMURA OSAMU ,  HONDA TATSUYA ,  FUJII GEN ,  SUZUKI YUKIE ,  KAWAMATA IKUKO

    IPC分类号： G02F1/1368 ,  H01L21/20 ,  H01L21/336 ,  H01L29/786

    CPC分类号： G02F1/1368 ,  G02F2202/104 ,  H01L21/2022 ,  H01L21/2026 ,  H01L27/124 ,  H01L27/1277 ,  H01L27/1292 ,  H01L27/3246 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3276 ,  H01L51/56

    摘要： A manufacturing method of a display device having TFTs capable of high-speed operation with few variations of threshold voltage is provided, in which materials are used with high efficiency and a small number of photomasks is required. The display device of the invention comprises a gate electrode layer (103) and a pixel electrode layer (120) formed over an insulating surface (100), a gate insulating layer (105) formed over the gate electrode layer (103), a crystalline semiconductor layer (107) formed over the gate insulating layer (105), a semiconductor layer having one conductivity type (109) formed in contact with the crystalline semiconductor layer (107), a source electrode layer (114) and a drain electrode layer (115) formed in contact with the semiconductor layer having one conductivity type (109), an insulating layer (140) formed over the source electrode layer (114), the drain electrode layer (115), and the pixel electrode layer (120), a first opening (138) formed in the insulating layer (140) to reach the source electrode layer (114) or the drain electrode layer (115), a second opening (139) formed in the gate insulating layer (105) and the insulating layer (140) to reach the pixel electrode layer (120), and a wiring layer (119) formed in the first opening (138) and the second opening (139) to electrically connect the source electrode layer (114) or the drain electrode layer (115) to the pixel electrode layer (120).

    摘要翻译： 提供一种具有能够以低阈值电压变化的高速操作的TFT的显示装置的制造方法，其中高效地使用材料并且需要少量光掩模。 本发明的显示装置包括形成在绝缘表面（100）上的栅电极层（103）和像素电极层（120），形成在栅电极层（103）上的栅绝缘层（105） 形成在栅极绝缘层105上的半导体层107，与晶体半导体层107接触而形成的具有一种导电型（109）的半导体层，源电极层（114）和漏电极层（107） （109），形成在所述源电极层（114），所述漏电极层（115）和所述像素电极层（120）上的绝缘层（140），所述半导体层具有一种导电类型（109） 形成在绝缘层140中以到达源电极层114或漏电极层115的第一开口138，形成在栅极绝缘层105中的第二开口139， 层（140）到达像素电极层（120），以及 形成在第一开口（138）和第二开口（139）中以将源电极层（114）或漏电极层（115）电连接到像素电极层（120）的布线层（119）。