公开(公告)号：EP3249814A1

公开(公告)日：2017-11-29

申请号：EP16206322.6

申请日：2016-12-22

Applicant: STMicroelectronics S.r.l.

Inventor： GONANO, Giovanni

IPC: H03F3/217 ,  H03F3/45

CPC classification number: H03F1/083 ,  G01R31/2825 ,  H03F3/183 ,  H03F3/217 ,  H03F3/2173 ,  H03F3/45071 ,  H03F3/45475 ,  H03F2200/03 ,  H03F2200/171 ,  H03F2200/351 ,  H03F2200/391 ,  H03F2200/393 ,  H03F2200/462 ,  H03F2203/45008 ,  H03F2203/45528 ,  H03F2203/45631 ,  H04R29/001

Abstract: A load driven by a switching amplifier, such as a Class D audio amplifier having a differential input, a LC output demodulator filter and a feedback network between the amplifier output and the differential input is measured by:
- AC driving (1000) the amplifier in a differential mode by applying a differential AC signal to the differential input and sensing the output current from the amplifier while driving the amplifier in the differential mode,
- AC driving (1002) the amplifier in a common mode by applying a common mode AC signal to the differential input and sensing the AC output current from the amplifier while driving the amplifier in the common mode, and
a) with the feedback network providing feedback towards said differential input from downstream the LC demodulator filter, computing (1006) the impedance of the load as a function of the differential mode output current and the common mode output current,
b) with the feedback network providing feedback towards the differential input from upstream the LC demodulator filter, measuring (1008a) the impedance value of the inductor of the LC demodulator filter, and computing (1008b) the impedance of the load as a function of the differential mode output current, the common mode output current and the impedance value of the inductor of the LC demodulator filter.

Abstract translation: 由开关放大器（例如具有差分输入的D类音频放大器，LC输出解调器滤波器以及放大器输出与差分输入之间的反馈网络）驱动的负载通过以下方式测量： - 交流驱动（1000）放大器输入 差分模式，通过将差分AC信号施加到差分输入并且在差分模式下驱动放大器时感测来自放大器的输出电流， - 通过将共模AC信号施加到AC模式来AC驱动（1002） 差分输入并在驱动共模放大器时从放大器感测AC输出电流，以及a）反馈网络从LC解调器滤波器的下游向所述差分输入提供反馈，计算（1006）负载的阻抗 作为差模输出电流和共模输出电流的函数，b）反馈网络向差分提供反馈 从LC解调器滤波器的上游输入，测量（1008a）LC解调器滤波器的电感器的阻抗值，并且计算（1008b）负载的阻抗作为差模输出电流，共模输出电流和 LC解调器滤波器的电感器的阻抗值。

公开(公告)号：EP4304087A1

公开(公告)日：2024-01-10

申请号：EP23178595.7

申请日：2023-06-12

Applicant: STMicroelectronics S.r.l.

Inventor： BOTTI, Edoardo ,  GONANO, Giovanni ,  RAIMONDI, Marco

IPC: H03K17/082 ,  H03F1/52 ,  H03F3/217

Abstract: A switching power stage comprising
at least a half bridge (11) comprising a respective high side switch (HSD) and low side switch (LSD) driven (12) by a PWM signal (PWMin), and
a cycle-by-cycle protection against over-currents circuit (15)
receiving said driving PWM signal (PWMin) and
configured to output a cycle-by-cycle protected driving signal (OutCBC) to drive said high side switch (HSD) and low side switch (LSD),
said cycle-by-cycle protection against over-currents circuit (15) receiving signals indicative of an over-currents (OcHsd, OcLsd) detected at said high side switch (HSD) and low side switch (LSD),
said cycle-by-cycle protection against over-currents circuit (15) being configured to output said cycle-by-cycle protected driving signal (OutCBC) as inverted driving PWM signal (PWMin) if, during the time interval in which one of the high side switch (HSD) or low side switch (LSD) is on, the signals indicative of an over-current (OcHsd, OcLsd) indicate that the current flowing in such switch crosses a give threshold (II), turning off the one of the high side switch or low side switch which is on, else the driving PWM signal (PWMin) is outputted not inverted,
wherein said power stage (10) further comprises an anomaly detection circuit (25) which receives at least the signals indicative of an over-current (OcHsd, OcLsd) and it is configured to switch off the high side and low side switches if an anomaly is detected in the pattern of over-current events (P, P1) in the the signals indicative of an over-current (OcHsd, OcLsd).

公开(公告)号：EP4262085A1

公开(公告)日：2023-10-18

申请号：EP23164021.0

申请日：2023-03-24

Applicant: STMicroelectronics S.r.l.

Inventor： STILGENBAUER, Francesco ,  CACCIAGRANO, Paolo ,  GONANO, Giovanni

IPC: H03F1/26 ,  H03F3/183 ,  H03F3/217 ,  H03G3/34

Abstract: A digital audio playback circuit comprises a noise shaping circuit configured to receive an input digital audio signal, and a digital to analog converter (DAC) configured to convert the input digital audio signal to a pre-amplified output analog audio signal according to a gain ramp defined by a gain control signal. A muting circuit is configured to compare input digital audio signal to a threshold and assert a mute control signal when the input digital audio signal is below the threshold. An analog gain control ramp circuit is configured to generate the gain control signal in response to the mute control signal to cause the gain ramp to ramp down. An amplifier is configured to amplify the pre-amplified output analog audio signal for playback by an audio playback device.

公开(公告)号：EP3522373B1

公开(公告)日：2020-08-05

申请号：EP19153337.1

申请日：2019-01-23

Applicant: STMicroelectronics S.r.l.

Inventor： BOTTI, Edoardo ,  GONANO, Giovanni

IPC: H03F3/217 ,  H03K17/00

公开(公告)号：EP3522374B1

公开(公告)日：2020-07-15

申请号：EP19153365.2

申请日：2019-01-23

Applicant: STMicroelectronics S.r.l.

Inventor： BOTTI, Edoardo ,  GONANO, Giovanni

IPC: H03F3/217 ,  H03K17/66 ,  H03K17/687 ,  H03K17/10