公开(公告)号：EP3179631A1

公开(公告)日：2017-06-14

申请号：EP16172256.6

申请日：2016-05-31

Applicant: STMicroelectronics S.r.l.

Inventor： BOTTI, Edoardo ,  RAIMONDI, Marco

IPC: H03F3/217 ,  H03F1/52 ,  H03F1/32

Abstract: A class-D audio-amplifier apparatus including a circuit (50) for reading a load current supplied by said amplifier to a load, said amplifier comprising a final stage, which includes a full-H bridge comprising a first half-bridge and a second half-bridge; said circuit (50) being configured for estimating said load current through reading of a current (I OUTP , I OUTM ) supplied by at least one power transistor (13b, 23b), by measuring a drain-to-source voltage (V DSLP ) thereof during an ON period. According to the invention, said apparatus comprises a sensing circuit (50) connected for detecting a first drain-to-source voltage (V SP ) from a transistor (13b) of the first half-bridge (12) and a second drain-to-source voltage (V SM ) from a corresponding transistor (23b) of the second half-bridge (22), said sensing circuit (50) comprising: a module (51) for computing a difference between said first detected drain-to-source voltage (V SP ) and said second detected drain-to-source voltage (V SM ); and a module (53) for performing an averaging operation on said difference to obtain a sense voltage value (V SENSE ) to be supplied to an analog-to-digital converter (54).

Abstract translation: 包括用于读取由所述放大器提供到负载的负载电流的电路（50）一种D类音频放大装置，所述放大器包括一个最后阶段，它包括一个全H桥包括第一半桥和第二 半桥; 所述电路（50）被配置用于通过一个电流（I OUTP，我OUTM）通过至少一个功率晶体管提供的读数估计所述负载电流（13B，23B），通过测量漏 - 源电压（V DSLP） 期间，在接通周期物。 。根据本发明，所述装置包括连接用于从晶体管检测第一漏极 - 源极电压（V SP）（13b）的所述第一半桥（12）和一个第二的漏极 - 到感测电路（50） 从相应的晶体管-source电压（V SM）（23B）的第二半桥（22），所述感测电路（50），包括：一个模块（51），用于计算说之间的差检测出第一漏极 - 源 电压（V SP）和所述第二检测的漏 - 源电压（V SM）; 并在平均手术对所述差进行，以获得感测的电压值（V SENSE）的模块（53）要被提供给模拟 - 数字转换器（54）。

公开(公告)号：EP4304087A1

公开(公告)日：2024-01-10

申请号：EP23178595.7

申请日：2023-06-12

Applicant: STMicroelectronics S.r.l.

Inventor： BOTTI, Edoardo ,  GONANO, Giovanni ,  RAIMONDI, Marco

IPC: H03K17/082 ,  H03F1/52 ,  H03F3/217

Abstract: A switching power stage comprising
at least a half bridge (11) comprising a respective high side switch (HSD) and low side switch (LSD) driven (12) by a PWM signal (PWMin), and
a cycle-by-cycle protection against over-currents circuit (15)
receiving said driving PWM signal (PWMin) and
configured to output a cycle-by-cycle protected driving signal (OutCBC) to drive said high side switch (HSD) and low side switch (LSD),
said cycle-by-cycle protection against over-currents circuit (15) receiving signals indicative of an over-currents (OcHsd, OcLsd) detected at said high side switch (HSD) and low side switch (LSD),
said cycle-by-cycle protection against over-currents circuit (15) being configured to output said cycle-by-cycle protected driving signal (OutCBC) as inverted driving PWM signal (PWMin) if, during the time interval in which one of the high side switch (HSD) or low side switch (LSD) is on, the signals indicative of an over-current (OcHsd, OcLsd) indicate that the current flowing in such switch crosses a give threshold (II), turning off the one of the high side switch or low side switch which is on, else the driving PWM signal (PWMin) is outputted not inverted,
wherein said power stage (10) further comprises an anomaly detection circuit (25) which receives at least the signals indicative of an over-current (OcHsd, OcLsd) and it is configured to switch off the high side and low side switches if an anomaly is detected in the pattern of over-current events (P, P1) in the the signals indicative of an over-current (OcHsd, OcLsd).

公开(公告)号：EP2983292A1

公开(公告)日：2016-02-10

申请号：EP15177977.4

申请日：2015-07-23

Applicant: STMicroelectronics S.r.l.

Inventor： RAIMONDI, Marco ,  BOTTI, Edoardo

IPC: H03F3/217

CPC classification number: H03F3/45932 ,  H03F1/0205 ,  H03F3/183 ,  H03F3/185 ,  H03F3/211 ,  H03F3/217 ,  H03F3/2173 ,  H03F2200/03 ,  H03F2200/129 ,  H03F2200/171 ,  H03F2200/258 ,  H03F2200/351 ,  H03F2200/78 ,  H03F2203/21106

Abstract: A switching amplifier includes: a first half-bridge PWM modulator (11a); a second half-bridge PWM modulator (11b); at least one amplifier stage (8), configured to receive input signals (I IN+ , I IN- ); and a PWM control stage (10), configured to control switching of the first PWM modulator (11a) and of the second PWM modulator (11b) as a function of the input signals (I IN+ , I IN- ), by respective first PWM control signals (S PWM+ ) and second PWM control signals (S PWM -). The amplifier stage (8) and the PWM control stage (10) have a fully differential structure.

Abstract translation: 开关放大器包括：第一半桥PWM调制器（11a）; 第二半桥PWM调制器（11b）; 至少一个放大器级（8），被配置为接收输入信号（I IN +，I IN-）; 以及PWM控制级（10），被配置为通过相应的第一PWM来控制所述第一PWM调制器（11a）和所述第二PWM调制器（11b）的切换作为所述输入信号（I IN +，I IN-）的函数 控制信号（S PWM +）和第二PWM控制信号（S PWM - ）。 放大器级（8）和PWM控制级（10）具有完全差分结构。

公开(公告)号：EP2983292B1

公开(公告)日：2018-09-19

申请号：EP15177977.4

申请日：2015-07-23

Applicant: STMicroelectronics S.r.l.

Inventor： RAIMONDI, Marco ,  BOTTI, Edoardo

IPC: H03F3/217 ,  H03F1/02 ,  H03F3/183 ,  H03F3/185 ,  H03F3/21 ,  H03F3/45

CPC classification number: H03F3/45932 ,  H03F1/0205 ,  H03F3/183 ,  H03F3/185 ,  H03F3/211 ,  H03F3/217 ,  H03F3/2173 ,  H03F2200/03 ,  H03F2200/129 ,  H03F2200/171 ,  H03F2200/258 ,  H03F2200/351 ,  H03F2200/78 ,  H03F2203/21106

Abstract: A switching amplifier includes: a first half-bridge PWM modulator (11a); a second half-bridge PWM modulator (11b); at least one amplifier stage (8), configured to receive input signals (I IN+ , I IN- ); and a PWM control stage (10), configured to control switching of the first PWM modulator (11a) and of the second PWM modulator (11b) as a function of the input signals (I IN+ , I IN- ), by respective first PWM control signals (S PWM+ ) and second PWM control signals (S PWM -). The amplifier stage (8) and the PWM control stage (10) have a fully differential structure.

公开(公告)号：EP3179631B1

公开(公告)日：2019-11-20

申请号：EP16172256.6

申请日：2016-05-31

Applicant: STMicroelectronics S.r.l.

Inventor： BOTTI, Edoardo ,  RAIMONDI, Marco

IPC: H03F3/217 ,  H03F1/52 ,  H03F1/32 ,  H03F3/185 ,  G01R19/00

公开(公告)号：EP3176595A1

公开(公告)日：2017-06-07

申请号：EP16172194.9

申请日：2016-05-31

Applicant: STMicroelectronics S.r.l.

Inventor： BOTTI, Edoardo ,  RAIMONDI, Marco

IPC: G01R27/02 ,  H04R5/04

CPC classification number: H04R29/00 ,  G01R27/02 ,  H04R5/04 ,  H04R29/001 ,  H04R2420/05

Abstract: A diagnostic circuit (40) for detecting the load status of an audio amplifier (20) is described. The audio amplifier (20) comprising two output terminals for connection to at least one speaker (30).
In particular, the diagnostic circuit (40) comprises a first (402), a second (404) and (406) third circuit.
The first circuit (402) is configured to generate a first signal (TV) indicating whether a signal (AAS) provided via the two output terminals comprises an audio signal.
The second circuit (404) is configured to detect a first measurement signal being indicative for the output current ( I out ) provided via the two output terminals, and compare the first measurement signal with at least one threshold in order to generate a second signal (LS) indicating whether the output current ( I out ) has a low current amplitude profile or a high current amplitude profile.
The third circuit (406) is configured to generate a diagnostic signal (DIAG) as a function of the first (TV) and the second (LS) signal. For example, the diagnostic signal (DIAG) may indicate an open load condition when the first signal (TV) indicates that the signal (AAS) provided via the two output terminals comprises an audio signal and the second signal (LS) indicates a low current amplitude profile.

Abstract translation: 用于检测音频放大器（20）的负载状态的诊断电路（40）进行说明。 音频放大器（20），包括两个输出端子，用于连接到至少一个扬声器（30）。 特别地，诊断电路（40）包括一个第一（402），第二（404）和（406）的第三电路。 所述第一电路（402）被配置成产生指示是否经由两个输出端的音频信号的步骤包括提供一个信号（AAS）的第一信号（TV）。 所述第二电路（404）被配置为检测第一测量信号指示用于经由两个输出端提供的输出电流（I OUT），并且所述第一测量信号与至少一个阈值，以便产生一个第二信号进行比较（ LS）表示是否输出电流（I OUT）具有低的电流振幅轮廓或高电流幅度分布。 所述第三电路（406）被配置为产生一个诊断信号（DIAG）作为第一（TV）的功能和第二（LS）信号。 例如，诊断信号（DIAG）可以指示一个开放负载状态当第一信号（TV）表示DASS死信号（AAS）经由两个输出端的音频信号和所述第二信号的方法包括：（LS）提供指示低电流 振幅曲线。

公开(公告)号：EP4293908A1

公开(公告)日：2023-12-20

申请号：EP23175269.2

申请日：2023-05-25

Applicant: STMicroelectronics S.r.l.

Inventor： BOTTI, Edoardo ,  STILGENBAUER, Francesco ,  RAIMONDI, Marco ,  CUSSOTTO, Elena

IPC: H03K17/0812 ,  H03F3/217 ,  H03K17/0814 ,  H03K17/16

Abstract: A switching circuit for use, e.g., in class D switching audio amplifiers comprises first and second half bridges with output nodes (Vout1, Vout2) to supplying an electrical load (L) via respective filter networks (Lo1, C1; Lo2, C2). During alternate switching sequences a first pair of transistors comprising the high-side transistor in one of the half bridges and the low-side transistor in the other of the half bridges is switched to a nonconductive state, and a second pair of transistors comprising the high-side transistor in the other of the half bridges and the low-side transistor in the other of the half bridges is switched to a conductive state. A current flow line is provided by an inductance (Laux) between the output nodes (Vout1, Vout2) with first and second capacitances coupled with the output nodes (Vout1, Vout2) of the half bridges. In a first, medium-high power operation mode (1 > Tshort(ZSL)), a control circuitry (12) switches the first and second switches to the conductive state between switching the first pair of transistors to a nonconductive state and the second pair of transistors to a conductive state. In a second, low power or quiescent operation mode (0 > Tlong(ZSL)), the control circuitry (12) refrains from switching the first and second switches to the conductive state, e.g., by applying a longer delay (ZSL Delay Control) to the switching command.